Re: CVS commit: src

[Christoph Egger <Christoph_Egger%gmx.de@localhost>]

Christos Zoulas wrote:
> Module Name:    src
> Committed By:   christos
> Date:           Fri May 30 18:49:03 UTC 2008
>
> Modified Files:
>         src/sys/arch/x86/include: cacheinfo.h
>         src/sys/arch/x86/x86: identcpu.c
>         src/usr.sbin/cpuctl/arch: i386.c
>
> Log Message:
> - fix an amd cache entry.
> - merge tables
> - support phenom
> from Paul Goyette

The array termination needs to be fixed.
For AMD's L3 cache, 0 means it is disabled.

Christoph