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CVS commit: src/sys/arch/amd64/amd64



Module Name:    src
Committed By:   ad
Date:           Mon Apr 28 19:35:56 UTC 2008

Modified Files:
        src/sys/arch/amd64/amd64: locore.S

Log Message:
- Make some entry/exit points preemption safe.
- Try to avoid mispredicted bracnhes in Xsyscall.
- Interrupts were being enabled in Xsyscall _after_ checking for ASTs,
  while could have resulted in ugly behaviour like delayed signals or
  context switches. Fix it.


To generate a diff of this commit:
cvs rdiff -r1.40 -r1.41 src/sys/arch/amd64/amd64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



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