CVS commit: src/sys/arch/sparc64/sparc64

[Takeshi Nakayama <nakayama%netbsd.org@localhost>]

Module Name:    src
Committed By:   nakayama
Date:           Mon Apr 14 16:14:20 UTC 2008

Modified Files:
        src/sys/arch/sparc64/sparc64: locore.s

Log Message:
Add workaround for BB_ERRATA_1 on writing to TICK_CMPR register in
next_tick().  If writing to TICK_CMPR fails, we lose hardclock interrupt
on secondary CPUs.

About BB_ERRATA_1 from comment in OpenSolaris:

/*
 * Writes to the TICK_COMPARE register sometimes fail on blackbird modules.
 * The failure occurs only when the following instruction decodes to wr or
 * wrpr.  The workaround is to immediately follow writes to TICK_COMPARE
 * with a read, thus stalling the pipe and keeping following instructions
 * from causing data corruption.  Aligning to a quadword will ensure these
 * two instructions are not split due to i$ misses.
 */


To generate a diff of this commit:
cvs rdiff -r1.275 -r1.276 src/sys/arch/sparc64/sparc64/locore.s

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.