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CVS commit: src/sys/arch/arm/iomd



Module Name:    src
Committed By:   chris
Date:           Tue Feb  5 14:40:11 UTC 2008

Modified Files:
        src/sys/arch/arm/iomd: vidcvideo.c

Log Message:
Fix up vidcvideo to be useable on a Write-Back processor, IE StrongArm,
during boot and ddb.

This is done by routing all requests for changes to the screen into one
function.  The function can then determine if interrupts are enabled or
disabled, and either flush them to screen immediately or set them up for
the next flyback irq.

Also if we have nothing to do, disable the flyback irq, and re-enable when
we have something to do.  This avoids taking an interrupt for every vsync,
IE 50-75Hz, just to do nothing.

This makes ddb usable and the boot dmesg visable with an SA.

lmbench now reports that the A7000+ has a 14Mhz CPU, rather than 4Mhz
(it's actually 48Mhz)

Tested on SA Risc-PC and A7000+


To generate a diff of this commit:
cvs rdiff -r1.32 -r1.33 src/sys/arch/arm/iomd/vidcvideo.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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