Module Name:	src
Committed By:	joerg
Date:		Mon Oct  1 03:00:10 UTC 2007

Modified Files:
	src/sys/arch/x86/x86 [jmcneill-pm]: ioapic.c

Log Message:
Reorder the writes of the IOAPIC redirection register. Writing the low
half first breaks if there is already a level interrupt waiting and the
destination in the high part is not valid yet.

Ensure that on ACPI resume, the possibly changed APIC IDs are written
back to match what the rest of the world expects.


To generate a diff of this commit:
cvs rdiff -r1.19.8.6 -r1.19.8.7 src/sys/arch/x86/x86/ioapic.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.