CVS commit: [chris-arm-intr-rework] src/sys/arch

[Chris Gilbert <chris%netbsd.org@localhost>]

Module Name:    src
Committed By:   chris
Date:           Sat Aug 11 21:14:54 UTC 2007

Modified Files:
        src/sys/arch/arm/conf [chris-arm-intr-rework]: files.footbridge
        src/sys/arch/arm/footbridge [chris-arm-intr-rework]: footbridge.c
            footbridge_intr.h footbridge_irqhandler.c
        src/sys/arch/arm/include [chris-arm-intr-rework]: cpu.h isa_machdep.h
            softintr.h
        src/sys/arch/cats/cats [chris-arm-intr-rework]: autoconf.c
            cats_machdep.c
        src/sys/arch/cats/include [chris-arm-intr-rework]: types.h
Added Files:
        src/sys/arch/arm/arm [chris-arm-intr-rework]: arm_irqhandler.c
            soft_irqhandler.c
        src/sys/arch/arm/include [chris-arm-intr-rework]: arm_intr.h

Log Message:
Initial check-in of reworked arm interrupt routines.

Main things to note on this branch:
* spl routines are inlined, less complex, and small (kernel drops in size)
* interrupts are handled in priority order (for most things it doesn't
  matter, but pending ipls are used to determine if there is any work to do)
* arm_irqhandler.c is derived from footbridge_irqhandler.c, which was based
  on work by thorpej.
* The code tries to touch hardware as little as possible.
* spl masks are no longer tracked, as the system is based on pending ipls

The shared code uses global ipl lists to track which interrupt handlers
are attached to which ipl (arm_iplq[]).

Interrupt sources register with the common code to indicate:
* how many irq lines they have
* a function to set the hardware mask.
* call arm_intr_claim and arm_intr_disestablish to setup handlers

When an interrupt occurs the ipl is flagged as pending, in ipls_pending.
If it can be handled at the current_ipl_level the code does so.
If it can't be handled it's left until the current_ipl_level drops.

As the ipl level changes down a quick test is made of the new ipl level
against the ipls_pending value.  If an ipl is pending arm_intr_splx_lifter
is called to handle the pending ipls.

It should be noted that all interrupts are left enabled at the hardware
level, interrupts are only masked when they occur.  They are only
re-enabled after it's interrupt handler is called.  Hardware masks are not
changed at any other time.

Soft interrupts are treated the same as hardware interrupts, they
register as a provider, and do not get treated specially.  All the soft
interrupt handlers are placed onto the relevant global ipl queue, the same
as hard interrupts handlers.

At the moment only footbridge within a cats has been updated to use the new
handling.

Todo:
* change the handling of interrupts, so that the hardware doesn't register
  a routine to fetch the hardware status.  Instead is makes a call which
  provides the mask.  This removes the primary flag when registering an
  interrupt provider.  It also makes more sense with multiple interrupt
  sources.
* Arm v5 has the clz asm, which could be used instead of the carefully
  hand rolled arm_intr_fls function.
* switch cats isa support to use this framework.
* switch iomd and acorn32 to use this framework.
* switch shark to use this framework.
* port any other arm platforms that are interested
* examine overlaps between this code and ppcoea-renovation branch.
* add support for different trigger types (Edge, level, pulse, etc)

(note that iomd and shark currently touch hardware on every spl change,
hence why they're targets to port)


To generate a diff of this commit:
cvs rdiff -r0 -r1.1.2.1 src/sys/arch/arm/arm/arm_irqhandler.c \
    src/sys/arch/arm/arm/soft_irqhandler.c
cvs rdiff -r1.12 -r1.12.28.1 src/sys/arch/arm/conf/files.footbridge
cvs rdiff -r1.17 -r1.17.24.1 src/sys/arch/arm/footbridge/footbridge.c \
    src/sys/arch/arm/footbridge/footbridge_irqhandler.c
cvs rdiff -r1.10 -r1.10.20.1 src/sys/arch/arm/footbridge/footbridge_intr.h
cvs rdiff -r0 -r1.1.2.1 src/sys/arch/arm/include/arm_intr.h
cvs rdiff -r1.45 -r1.45.2.1 src/sys/arch/arm/include/cpu.h
cvs rdiff -r1.4 -r1.4.80.1 src/sys/arch/arm/include/isa_machdep.h
cvs rdiff -r1.3 -r1.3.22.1 src/sys/arch/arm/include/softintr.h
cvs rdiff -r1.11 -r1.11.6.1 src/sys/arch/cats/cats/autoconf.c
cvs rdiff -r1.58 -r1.58.28.1 src/sys/arch/cats/cats/cats_machdep.c
cvs rdiff -r1.9 -r1.9.10.1 src/sys/arch/cats/include/types.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.