Module Name:	src
Committed By:	gdamore
Date:		Mon Oct  2 02:08:36 UTC 2006

Modified Files:
	src/sys/arch/mips/alchemy: au_icu.c

Log Message:
Fix incorrect code which ignored "req", causing all interrupts to get
assigned to request 0.  With this change, ethernet interrupts are assigned
to req1, seperately from req0.  This potentially gives better performance
by shortening the list of handlers walked somewhat.


To generate a diff of this commit:
cvs rdiff -r1.19 -r1.20 src/sys/arch/mips/alchemy/au_icu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.