Module Name:	src
Committed By:	tsutsui
Date:		Fri Sep 29 14:03:08 UTC 2006

Modified Files:
	src/sys/dev/ic: rtl81x9.c

Log Message:
Pull mii_readreg fix from FreeBSD if_rl.c rev 1.81:

> When reading PHY regs over the i2c bus, the turnaround ACK bit
> is read one clock edge too late. This bit is driven low by
> slave (as any other input data bits from slave) when the clock
> is LOW. The current code did read the bit after the clock was
> driven high again.


To generate a diff of this commit:
cvs rdiff -r1.55 -r1.56 src/sys/dev/ic/rtl81x9.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.