Module Name:	src
Committed By:	hpeyerl
Date:		Mon Feb  9 22:29:26 UTC 2004

Modified Files:
	src/sys/dev/ic: i82557.c

Log Message:
On some 'fast' i386 motherboards, the timing between consecutive reads
and writes of the EEPROM are too fast so invalid data is returned. So we
increase the DELAY()s.  The right thing would be to check a ready bit
on the E^2 if such a thing exists.  (checked by potr)


To generate a diff of this commit:
cvs rdiff -r1.78 -r1.79 src/sys/dev/ic/i82557.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.