CVS commit: src/sys/arch/arm/ixp12x0

[Naoto SHIMAZAKI <igy%netbsd.org@localhost>]

Module Name:    src
Committed By:   igy
Date:           Mon Jul 21 06:17:34 UTC 2003

Modified Files:
        src/sys/arch/arm/ixp12x0: ixp12x0_intr.c

Log Message:
Delaying to mask interrupt by hardware until actually it occurs.

The new code maintains two variables 'current_spl_level' and
'hardware_spl_level'.  Variable hardware_spl_level reflects actual
priority level at the hardware's point of view.  hardware_spl_level is
always synchronized to hardware.

splraise() just increases current_spl_level.  splx() sets
current_spl_level.  If (and only if) hardware_spl_level and
current_spl_level is not same, splx() synchronizes interrupt mask
register and hardware_spl_level to current_spl_level.

In most case, splraise() raises current_spl_level and splx() restores
only current_spl_level.

When an interrupt occurs, hardware_spl_level and interrupt mask
register are synchronized to current_spl_level.

In this implementation, during a higher priority interrupt handler is
running, lower priority interrupts never cause intr_dispatch() to run.
It will avoid some race condition.


To generate a diff of this commit:
cvs rdiff -r1.9 -r1.10 src/sys/arch/arm/ixp12x0/ixp12x0_intr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.