Module Name:	syssrc
Committed By:	simonb
Date:		Fri Nov 15 01:23:18 UTC 2002

Modified Files:
	syssrc/sys/arch/mips/mips: cache_mipsNN.c

Log Message:
Add a hack to mipsNN_pdcache_wbinv_range_index_32_4way() so that we
use the index ops at a offset of the page size as well, controlled by
an MIPS64_SB1 check.  The SB1 D-cache way size is physically indexed
and twice as big as the page size (4k), so we weren't flushing all the
addresses we needed too.

XXX: This is kinda gross; will be cleaned up and made more generic soon.
There are still other SB1-specific issues to be cleaned up too...


To generate a diff of this commit:
cvs rdiff -r1.4 -r1.5 syssrc/sys/arch/mips/mips/cache_mipsNN.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.