Subject: CVS commit: syssrc/sys/arch/sh5
To: None <source-changes@netbsd.org>
From: Steve Woodford <scw@netbsd.org>
List: source-changes
Date: 09/01/2002 14:40:54
Module Name:	syssrc
Committed By:	scw
Date:		Sun Sep  1 11:40:54 UTC 2002

Modified Files:
	syssrc/sys/arch/sh5/include: frame.h
	syssrc/sys/arch/sh5/sh5: cpu_switch.S db_interface.c exception.S
	    genassym.cf process_machdep.c trap.c vm_machdep.c

Log Message:
Move registers r10-r13 over to the Caller-saved set, at least as far
as intrframe and trapframe are concerned.

According to the ABI, only the low 32-bits of these registers are
guaranteed to be preserved by the callee. Therefore, we need to
preserve all 64-bits of them in the interrupt trampoline.


To generate a diff of this commit:
cvs rdiff -r1.3 -r1.4 syssrc/sys/arch/sh5/include/frame.h
cvs rdiff -r1.6 -r1.7 syssrc/sys/arch/sh5/sh5/cpu_switch.S \
    syssrc/sys/arch/sh5/sh5/trap.c
cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/sh5/sh5/db_interface.c \
    syssrc/sys/arch/sh5/sh5/vm_machdep.c
cvs rdiff -r1.8 -r1.9 syssrc/sys/arch/sh5/sh5/exception.S
cvs rdiff -r1.5 -r1.6 syssrc/sys/arch/sh5/sh5/genassym.cf
cvs rdiff -r1.1 -r1.2 syssrc/sys/arch/sh5/sh5/process_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.