CVS commit: syssrc/sys/arch/sgimips/sgimips

[Rafal Boni <rafal%netbsd.org@localhost>]

Module Name:    syssrc
Committed By:   rafal
Date:           Thu May  2 18:00:41 UTC 2002

Modified Files:
        syssrc/sys/arch/sgimips/sgimips: ip22.c

Log Message:
Since we don't have code to drive the L2 cache on R4600/R5k processors,
disable the L2 cache so at least things work (albeit more slowly) on
the SC versions of those chips.  Tested on a R4600 Indy and a R4400
Challenge S.


To generate a diff of this commit:
cvs rdiff -r1.9 -r1.10 syssrc/sys/arch/sgimips/sgimips/ip22.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.