Module Name:	syssrc
Committed By:	thorpej
Date:		Wed Nov 28 23:48:36 UTC 2001

Modified Files:
	syssrc/sys/arch/algor/dev: mainbus.c
	syssrc/sys/arch/arm/xscale: i80312_pci.c
	syssrc/sys/arch/bebox/bebox: mainbus.c
	syssrc/sys/arch/evbarm/ifpga: ifpga.c
	syssrc/sys/arch/prep/prep: mainbus.c
	syssrc/sys/arch/sandpoint/sandpoint: mainbus.c
	syssrc/sys/arch/walnut/walnut: mainbus.c
	syssrc/sys/dev/pci: pciconf.c pciconf.h

Log Message:
Add a "cacheline_size" argument to pci_configure_bus().  It is used
to set the cacheline size in the BHLC register.  This should be the
size of the largest D-cache line on a system.


To generate a diff of this commit:
cvs rdiff -r1.6 -r1.7 syssrc/sys/arch/algor/dev/mainbus.c
cvs rdiff -r1.3 -r1.4 syssrc/sys/arch/arm/xscale/i80312_pci.c
cvs rdiff -r1.9 -r1.10 syssrc/sys/arch/bebox/bebox/mainbus.c
cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/evbarm/ifpga/ifpga.c
cvs rdiff -r1.5 -r1.6 syssrc/sys/arch/prep/prep/mainbus.c
cvs rdiff -r1.6 -r1.7 syssrc/sys/arch/sandpoint/sandpoint/mainbus.c
cvs rdiff -r1.7 -r1.8 syssrc/sys/arch/walnut/walnut/mainbus.c
cvs rdiff -r1.13 -r1.14 syssrc/sys/dev/pci/pciconf.c
cvs rdiff -r1.4 -r1.5 syssrc/sys/dev/pci/pciconf.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.