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CVS commit: [thorpej-mips-cache] syssrc/sys/arch/cobalt



Module Name:    syssrc
Committed By:   thorpej
Date:           Tue Nov 13 22:34:45 UTC 2001

Modified Files:
        syssrc/sys/arch/cobalt/cobalt [thorpej-mips-cache]: bus.c
        syssrc/sys/arch/cobalt/include [thorpej-mips-cache]: bus.h

Log Message:
bus_dmamap_sync() optimizes for the virtually-indexed write-back
cache present on the RM52xx CPU that the Cobalt usees.


To generate a diff of this commit:
cvs rdiff -r1.11.2.1 -r1.11.2.2 syssrc/sys/arch/cobalt/cobalt/bus.c
cvs rdiff -r1.6 -r1.6.4.1 syssrc/sys/arch/cobalt/include/bus.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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