Module Name:	syssrc
Committed By:	thorpej
Date:		Thu May 31 18:47:22 UTC 2001

Modified Files:
	syssrc/sys/dev/mii: gphyter.c

Log Message:
On the Gig PHYTER, For whatever reason, the 10baseT-related bits of the
BMSR are wired to 0, yet the PHY supports 10baseT.  So, to get around
this, we test the ANAR 10baseT bits after a PHY reset.  These bits are
set according to input pin 180.  If we see the 10baseT ANAR bits set,
we fake them in the BMSR so that we can actually autonegotiate 10baseT.


To generate a diff of this commit:
cvs rdiff -r1.1 -r1.2 syssrc/sys/dev/mii/gphyter.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.