Module Name:	pkgsrc
Committed By:	dmcmahill
Date:		Fri Jun 30 19:55:07 UTC 2000

Modified Files:
	pkgsrc/cad/verilog/files: patch-sum
Added Files:
	pkgsrc/cad/verilog/patches: patch-aa

Log Message:
make the default timescale in the output VCD files be 1ns for compatibility
with viewers such as Dinotrace.


To generate a diff of this commit:
cvs rdiff -r1.4 -r1.5 pkgsrc/cad/verilog/files/patch-sum
cvs rdiff -r0 -r1.3 pkgsrc/cad/verilog/patches/patch-aa

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.