Module Name:	syssrc
Committed By:	soda
Date:		Fri Jun  9 06:07:03 UTC 2000

Modified Files:
	syssrc/sys/arch/arc/arc: machdep.c wired_map.c
	syssrc/sys/arch/mips/include: cpuregs.h
	syssrc/sys/arch/mips/mips: locore_mips3.S mips_machdep.c

Log Message:
Decrease MIPS3_TLB_WIRED_ENTRIES from 8 to 2,
and rename it to MIPS3_TLB_WIRED_UPAGES.
The value of wired register becomes variable on arc port,
and arc is the only mips3 port which uses the wired TLB entries 2..7.


To generate a diff of this commit:
cvs rdiff -r1.37 -r1.38 syssrc/sys/arch/arc/arc/machdep.c
cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/arc/arc/wired_map.c
cvs rdiff -r1.33 -r1.34 syssrc/sys/arch/mips/include/cpuregs.h
cvs rdiff -r1.33 -r1.34 syssrc/sys/arch/mips/mips/locore_mips3.S
cvs rdiff -r1.87 -r1.88 syssrc/sys/arch/mips/mips/mips_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.