Module Name:	syssrc
Committed By:	nisimura
Date:		Wed May 10 01:34:15 UTC 2000

Modified Files:
	syssrc/sys/arch/mips/include: locore.h
	syssrc/sys/arch/mips/mips: genassym.cf locore.S locore_mips1.S
	    locore_mips3.S mips_machdep.c

Log Message:
Have mips_locoresw[] of 3 entry pointer array for different
implementation of locore routines between MIPS1 and MIPS3.  It's
independent from mips_locore_jumpvec_t which is for cache/TLB
manipulating routines peculiar to processor designs.  mips_locore_jumpvec_t
will be replaced with "processor closures" encapsulating implementation
parameters (cpuinfo) and pointers to conventaion routines (cpuops),
eventually.


To generate a diff of this commit:
cvs rdiff -r1.30 -r1.31 syssrc/sys/arch/mips/include/locore.h
cvs rdiff -r1.16 -r1.17 syssrc/sys/arch/mips/mips/genassym.cf
cvs rdiff -r1.96 -r1.97 syssrc/sys/arch/mips/mips/locore.S
cvs rdiff -r1.30 -r1.31 syssrc/sys/arch/mips/mips/locore_mips1.S
cvs rdiff -r1.26 -r1.27 syssrc/sys/arch/mips/mips/locore_mips3.S
cvs rdiff -r1.76 -r1.77 syssrc/sys/arch/mips/mips/mips_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.