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CVS commit: basesrc

Module Name:    basesrc
Committed By:   is
Date:           Thu Sep 16 09:15:05 UTC 1999

Modified Files:
        basesrc/lib/libc/arch/arm32/gen: divsi3.S

Log Message:
In the division core: if the highest bit of the dividend is set,
we have to be careful when shifting the divisor. Test this.

This fixes PR 7760 by Richard Earnshaw.

To generate a diff of this commit:
cvs rdiff -r1.2 -r1.3 basesrc/lib/libc/arch/arm32/gen/divsi3.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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