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CVS commit: syssrc
Module Name: syssrc
Committed By: nisimura
Date: Thu Sep 9 01:50:48 UTC 1999
syssrc/sys/arch/pmax/tc [nisimura-pmax-wscons]: asc_ioasic.c
Add more SCR/SDR0/SDR1 improvement. From the analysis on Mach3/pmax codes.
IOASIC SCSI DMA is performed on 8-byte boundary. Unaligned transaction
requires special care managed by these registers. SDR0/SDR1 hold unaligned
data upto 6 bytes in 2 byte increment while SCR indicates the cases. Disk
block I/O operation behaves gracefully and is immune to unaligned transfers.
TODO.1 - introduce bus_dmamap_load(); must be good for either of R3000
cache and R4000 cache.
TODO.2 - handle PTR LOAD interrupt to perform 'chained' DMA spans 3+ page
TODO.3 - tape drive ...
TODO.4 - syncing disks on halt/reboot.
TODO.5 - dumping core memory on panic.
TODO.6 - test ss/uk/ch drives.
To generate a diff of this commit:
cvs rdiff -r126.96.36.199 -r188.8.131.52 syssrc/sys/arch/pmax/tc/asc_ioasic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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