Subject: CVS commit: src
To: None <source-changes@netbsd.org>
From: Tohru Nishimura <nisimura@netbsd.org>
List: source-changes
Date: 04/07/1999 20:14:36
Module Name:	src
Committed By:	nisimura
Date:		Thu Apr  8 03:14:36 UTC 1999

Modified Files:
	src/sys/arch/pmax/include: bus.h
Log Message:
- MIPS processors do not require to have memory barrier prior to read ops.