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CVS commit: src



Module Name:    src
Committed By:   nisimura
Date:           Fri Dec  4 10:32:09 UTC 1998

Modified Files:
        src/sys/arch/mips/include: cpuregs.h
Log Message:
- Fix an error in primary cache line size detection logic; when IC and/or DC
bit is 1, then line size is 32.  Otherwise, 16.




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