cgd
Fri Sep 29 23:09:14 EDT 1995
Update of /a/cvsroot/src/lib/libc/arch/alpha/gen
In directory pain.lcs.mit.edu:/b/tmp/cvs-serv16776

Modified Files:
	divrem.m4 
Log Message:
deal properly (i hope!) with registers' upper 32 bits, when doing
32-bit division and remainder.  Sometimes, when optimizing, they could
have been different than previously expected (and could have caused
hokey results).