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[src/netbsd-10]: src/sys/dev Pull up following revision(s) (requested by rin ...



details:   https://anonhg.NetBSD.org/src/rev/9678dfa14df9
branches:  netbsd-10
changeset: 377374:9678dfa14df9
user:      martin <martin%NetBSD.org@localhost>
date:      Sun Jul 09 13:39:27 2023 +0000

description:
Pull up following revision(s) (requested by rin in ticket #229):

        sys/dev/pci/virtio_pci.c: revision 1.43
        sys/dev/virtio/virtio_mmio.c: revision 1.11

virtio(4): Fix byte order of DMA data for armeb in the same manner as
aarch64eb.

Fix comments to explain what is going on for {arm,aarch64}eb on QEMU.
This is not due to QEMU bugs; it correctly configures everything for
little-endian environment, and we forcibly change byte order only for
CPU cores during kernel bootstrap.

diffstat:

 sys/dev/pci/virtio_pci.c     |  19 ++++++++++---------
 sys/dev/virtio/virtio_mmio.c |  10 ++++------
 2 files changed, 14 insertions(+), 15 deletions(-)

diffs (75 lines):

diff -r b3708012a1a9 -r 9678dfa14df9 sys/dev/pci/virtio_pci.c
--- a/sys/dev/pci/virtio_pci.c  Fri Jul 07 19:04:02 2023 +0000
+++ b/sys/dev/pci/virtio_pci.c  Sun Jul 09 13:39:27 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: virtio_pci.c,v 1.38.4.2 2023/06/03 14:40:25 martin Exp $ */
+/* $NetBSD: virtio_pci.c,v 1.38.4.3 2023/07/09 13:39:27 martin Exp $ */
 
 /*
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -28,7 +28,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: virtio_pci.c,v 1.38.4.2 2023/06/03 14:40:25 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: virtio_pci.c,v 1.38.4.3 2023/07/09 13:39:27 martin Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -138,15 +138,16 @@ static bool       virtio_pci_msix_enabled(stru
 #define VIRTIO_MSIX_QUEUE_VECTOR_INDEX 1
 
 /*
- * When using PCI attached virtio on aarch64-eb under Qemu, the IO space
- * suddenly read BIG_ENDIAN where it should stay LITTLE_ENDIAN. The data read
- * 1 byte at a time seem OK but reading bigger lengths result in swapped
- * endian. This is most notable on reading 8 byters since we can't use
- * bus_space_{read,write}_8().
+ * For big-endian aarch64/armv7 on QEMU (and most real HW), only CPU cores
+ * are running in big-endian mode, with all peripheral being configured to
+ * little-endian mode. Their default bus_space(9) functions forcibly swap
+ * byte-order. This guarantees that PIO'ed data from pci(4), e.g., are
+ * correctly handled by bus_space(9), while DMA'ed ones should be swapped
+ * by hand, in violation of virtio(4) specifications.
  */
 
-#if defined(__aarch64__) && BYTE_ORDER == BIG_ENDIAN
-#      define READ_ENDIAN_09   BIG_ENDIAN      /* should be LITTLE_ENDIAN */
+#if (defined(__aarch64__) || defined(__arm__)) && BYTE_ORDER == BIG_ENDIAN
+#      define READ_ENDIAN_09   BIG_ENDIAN
 #      define READ_ENDIAN_10   BIG_ENDIAN
 #      define STRUCT_ENDIAN_09 BIG_ENDIAN
 #      define STRUCT_ENDIAN_10 LITTLE_ENDIAN
diff -r b3708012a1a9 -r 9678dfa14df9 sys/dev/virtio/virtio_mmio.c
--- a/sys/dev/virtio/virtio_mmio.c      Fri Jul 07 19:04:02 2023 +0000
+++ b/sys/dev/virtio/virtio_mmio.c      Sun Jul 09 13:39:27 2023 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: virtio_mmio.c,v 1.7.4.2 2023/06/03 14:40:25 martin Exp $       */
+/*     $NetBSD: virtio_mmio.c,v 1.7.4.3 2023/07/09 13:39:27 martin Exp $       */
 /*     $OpenBSD: virtio_mmio.c,v 1.2 2017/02/24 17:12:31 patrick Exp $ */
 
 /*
@@ -29,7 +29,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: virtio_mmio.c,v 1.7.4.2 2023/06/03 14:40:25 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: virtio_mmio.c,v 1.7.4.3 2023/07/09 13:39:27 martin Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -68,12 +68,10 @@
 /*
  * MMIO configuration space for virtio-mmio v1 is in guest byte order.
  *
- * XXX Note that aarch64eb pretends to be little endian. the MMIO registers
- * are in little endian but the device config registers and data structures
- * are in big endian; this is due to a bug in current Qemu.
+ * XXX For big-endian aarch64 and arm, see note in virtio_pci.c.
  */
 
-#if defined(__aarch64__) && BYTE_ORDER == BIG_ENDIAN
+#if (defined(__aarch64__) || defined(__arm__)) && BYTE_ORDER == BIG_ENDIAN
 #      define READ_ENDIAN      LITTLE_ENDIAN
 #      define STRUCT_ENDIAN    BIG_ENDIAN
 #elif BYTE_ORDER == BIG_ENDIAN



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