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[src/netbsd-10]: src/sys/dev/wscons Pull up following revision(s) (requested ...
details: https://anonhg.NetBSD.org/src/rev/e02bf481d729
branches: netbsd-10
changeset: 377289:e02bf481d729
user: martin <martin%NetBSD.org@localhost>
date: Wed Jul 05 16:09:50 2023 +0000
description:
Pull up following revision(s) (requested by abs in ticket #224):
sys/dev/wscons/wsdisplay_vconsvar.h: revision 1.34
sys/dev/wscons/wsdisplay_glyphcachevar.h: revision 1.6
sys/arch/sparc/dev/cgfourteen.c: revision 1.94
sys/arch/sparc/dev/cgfourteen.c: revision 1.95
sys/dev/sbus/mgx.c: revision 1.21
sys/dev/sbus/mgx.c: revision 1.22
sys/dev/sbus/mgx.c: revision 1.23
sys/dev/wscons/wsdisplay_vcons.c: revision 1.65
sys/dev/wscons/wsdisplay_vcons.c: revision 1.66
sys/dev/wscons/wsdisplay_glyphcache.c: revision 1.12
sys/arch/sparc/dev/sxvar.h: revision 1.5
sys/arch/sparc/dev/sx.c: revision 1.6
sys/arch/sparc/dev/sx.c: revision 1.7
make vcons_putchar_buffer() return a flag indicating if anything actually
changed, skip the actual drawing op if nothing did
add flags for drivers to requesr R2L bit/byte-ordered fonts, default to
L2R, chack them in vcons_load_font() instead of just trusting that we'd get
what we need
initialize the diagnostic register with the value suggested by the SunOS
header. This sets a bunch of undocumented bits and yields a 10% speed increase
when rendering antialiased text.
use macros compatible with xf86-video-suncg14 to issue SX instructions
much more readable, alignment weirdness is handled automatically and code is
interchangable
allow drivers to specify horizontal alignment of glyph cache cells
for things like SX which have alignment restrictions
add counter to periodically drain the instruction queue in order to avoid
stalling the MBus during long SX operations
adapted from xf86-video-suncg14
- use sx_wait() to avoid stalling the MBus
- request 32bit alignment for glyphcache cells
wait for the engine to go idle before issuing rectfill commands
we get occasional overlap with blit commands if we just wait for fifo slots
needs further investigation, it is possible that not all writes to drawing
engine registers are pipelined and of course we don't have docs
following a hunch...
- cache DEC and FG registers, only write them if the value actually changes
- wait for the engine to go idle before writing DEC
- wait for FIFO slots on everything else
with this we avoid waiting if possible and still avoid overlapping blit and
fill commands
diffstat:
sys/arch/sparc/dev/cgfourteen.c | 91 +++++++++++++++++--------------
sys/arch/sparc/dev/sx.c | 7 +-
sys/arch/sparc/dev/sxvar.h | 25 ++++++++-
sys/dev/sbus/mgx.c | 46 +++++++++++----
sys/dev/wscons/wsdisplay_glyphcache.c | 27 +++++++-
sys/dev/wscons/wsdisplay_glyphcachevar.h | 7 ++-
sys/dev/wscons/wsdisplay_vcons.c | 36 ++++++++----
sys/dev/wscons/wsdisplay_vconsvar.h | 7 ++-
8 files changed, 168 insertions(+), 78 deletions(-)
diffs (truncated from 705 to 300 lines):
diff -r f7f0a2fc9a87 -r e02bf481d729 sys/arch/sparc/dev/cgfourteen.c
--- a/sys/arch/sparc/dev/cgfourteen.c Mon Jul 03 09:40:29 2023 +0000
+++ b/sys/arch/sparc/dev/cgfourteen.c Wed Jul 05 16:09:50 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cgfourteen.c,v 1.93 2022/05/25 21:01:04 macallan Exp $ */
+/* $NetBSD: cgfourteen.c,v 1.93.4.1 2023/07/05 16:09:50 martin Exp $ */
/*
* Copyright (c) 1996
@@ -168,6 +168,21 @@ static void cg14_copycols(void *, int, i
static void cg14_erasecols(void *, int, int, int, long);
static void cg14_copyrows(void *, int, int, int);
static void cg14_eraserows(void *, int, int, long);
+
+/*
+ * issue ALU instruction:
+ * sxi(OPCODE, srcA, srcB, dest, count)
+ */
+#define sxi(inst, a, b, d, cnt) \
+ sx_wait(sc->sc_sx); \
+ sx_write(sc->sc_sx, SX_INSTRUCTIONS, inst((a), (b), (d), (cnt)))
+
+/*
+ * issue memory referencing instruction:
+ * sxm(OPCODE, address, start register, count)
+ */
+#define sxm(inst, addr, reg, count) sta((addr) & ~7, ASI_SX, inst((reg), (count), (addr) & 7))
+
#endif /* NSX > 0 */
#endif
@@ -358,7 +373,7 @@ cgfourteenattach(device_t parent, device
sc->sc_fbaddr, 0, 0, 0) & 0xfffff000;
aprint_normal_dev(sc->sc_dev, "using %s\n",
device_xname(sc->sc_sx->sc_dev));
- aprint_debug_dev(sc->sc_dev, "fb paddr: %08x\n",
+ aprint_normal_dev(sc->sc_dev, "fb paddr: %08x\n",
sc->sc_fb_paddr);
sx_write(sc->sc_sx, SX_PAGE_BOUND_LOWER, sc->sc_fb_paddr);
sx_write(sc->sc_sx, SX_PAGE_BOUND_UPPER,
@@ -379,7 +394,7 @@ cgfourteenattach(device_t parent, device
* the last close. This kind of nonsense is needed to give screenblank
* a fighting chance of working.
*/
-
+
int
cgfourteenopen(dev_t dev, int flags, int mode, struct lwp *l)
{
@@ -567,8 +582,9 @@ cgfourteenmmap(dev_t dev, off_t off, int
0, prot, BUS_SPACE_MAP_LINEAR));
} else if (off >= CG14_SXIO_VOFF &&
off < (CG14_SXIO_VOFF + 0x03ffffff)) {
+ off -= CG14_SXIO_VOFF;
return (bus_space_mmap(sc->sc_sx->sc_tag, 0x800000000LL,
- sc->sc_fb_paddr + (off - CG14_SXIO_VOFF),
+ sc->sc_fb_paddr + off,
prot, BUS_SPACE_MAP_LINEAR));
#endif
} else
@@ -756,13 +772,13 @@ cg14_setup_wsdisplay(struct cgfourteen_s
sc->sc_defaultscreen_descr.capabilities = ri->ri_caps;
sc->sc_defaultscreen_descr.nrows = ri->ri_rows;
sc->sc_defaultscreen_descr.ncols = ri->ri_cols;
- glyphcache_init(&sc->sc_gc, sc->sc_fb.fb_type.fb_height + 5,
+ glyphcache_init_align(&sc->sc_gc, sc->sc_fb.fb_type.fb_height + 5,
(sc->sc_vramsize / sc->sc_fb.fb_type.fb_width) -
sc->sc_fb.fb_type.fb_height - 5,
sc->sc_fb.fb_type.fb_width,
ri->ri_font->fontwidth,
ri->ri_font->fontheight,
- defattr);
+ defattr, 4);
if (is_cons) {
wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0,
defattr);
@@ -1204,20 +1220,20 @@ cg14_rectfill(struct cgfourteen_softc *s
pptr = addr;
cnt = wi;
if (pre) {
- sta(pptr & ~7, ASI_SX, SX_STBS(8, pre - 1, pptr & 7));
+ sxm(SX_STBS, pptr, 8, pre - 1);
pptr += pre;
cnt -= pre;
}
/* now do the aligned pixels in 32bit chunks */
while(cnt > 3) {
words = uimin(32, cnt >> 2);
- sta(pptr & ~7, ASI_SX, SX_STS(8, words - 1, pptr & 7));
+ sxm(SX_STS, pptr, 8, words - 1);
pptr += words << 2;
cnt -= words << 2;
}
/* do any remaining pixels byte-wise again */
if (cnt > 0)
- sta(pptr & ~7, ASI_SX, SX_STBS(8, cnt - 1, pptr & 7));
+ sxm(SX_STBS, pptr, 8, cnt - 1);
addr += stride;
}
}
@@ -1275,28 +1291,25 @@ cg14_invert(struct cgfourteen_softc *sc,
for (line = 0; line < he; line++) {
pptr = addr;
/* load a whole scanline */
- sta(pptr & ~7, ASI_SX, SX_LD(8, words - 1, pptr & 7));
+ sxm(SX_LD, pptr, 8, words - 1);
reg = 8;
if (pre) {
cg14_set_mask(sc, lmask);
- sx_write(sc->sc_sx, SX_INSTRUCTIONS,
- SX_ROPB(8, 8, 40, 0));
+ sxi(SX_ROPB, 8, 8, 40, 0);
reg++;
}
if (cnt > 0) {
cg14_set_mask(sc, 0xffffffff);
/* XXX handle cnt > 16 */
- sx_write(sc->sc_sx, SX_INSTRUCTIONS,
- SX_ROP(reg, reg, reg + 32, cnt - 1));
+ sxi(SX_ROP, reg, reg, reg + 32, cnt - 1);
reg += cnt;
}
if (post) {
cg14_set_mask(sc, rmask);
- sx_write(sc->sc_sx, SX_INSTRUCTIONS,
- SX_ROPB(reg, 7, reg + 32, 0));
+ sxi(SX_ROPB, reg, 7, reg + 32, 0);
reg++;
}
- sta(pptr & ~7, ASI_SX, SX_ST(40, words - 1, pptr & 7));
+ sxm(SX_ST, pptr, 40, words - 1);
addr += stride;
}
}
@@ -1307,7 +1320,7 @@ cg14_slurp(int reg, uint32_t addr, int c
int num;
while (cnt > 0) {
num = uimin(32, cnt);
- sta(addr & ~7, ASI_SX, SX_LD(reg, num - 1, addr & 7));
+ sxm(SX_LD, addr, reg, num - 1);
cnt -= num;
reg += num;
addr += (num << 2);
@@ -1320,7 +1333,7 @@ cg14_spit(int reg, uint32_t addr, int cn
int num;
while (cnt > 0) {
num = uimin(32, cnt);
- sta(addr & ~7, ASI_SX, SX_ST(reg, num - 1, addr & 7));
+ sxm(SX_ST, addr, reg, num - 1);
cnt -= num;
reg += num;
addr += (num << 2);
@@ -1355,10 +1368,8 @@ cg14_bitblt(void *cookie, int xs, int ys
dptr = daddr;
cnt = wi;
if (pre > 0) {
- sta(sptr & ~7, ASI_SX,
- SX_LDB(32, pre - 1, sptr & 7));
- sta(dptr & ~7, ASI_SX,
- SX_STB(32, pre - 1, dptr & 7));
+ sxm(SX_LDB, sptr, 32, pre - 1);
+ sxm(SX_STB, dptr, 32, pre - 1);
cnt -= pre;
sptr += pre;
dptr += pre;
@@ -1373,10 +1384,8 @@ cg14_bitblt(void *cookie, int xs, int ys
cnt -= num << 2;
}
if (cnt > 0) {
- sta(sptr & ~7, ASI_SX,
- SX_LDB(32, cnt - 1, sptr & 7));
- sta(dptr & ~7, ASI_SX,
- SX_STB(32, cnt - 1, dptr & 7));
+ sxm(SX_LDB, sptr, 32, cnt - 1);
+ sxm(SX_STB, dptr, 32, cnt - 1);
}
saddr += skip;
daddr += skip;
@@ -1389,17 +1398,15 @@ cg14_bitblt(void *cookie, int xs, int ys
dptr = daddr;
cnt = wi;
while(cnt > 31) {
- sta(sptr & ~7, ASI_SX, SX_LDB(32, 31, sptr & 7));
- sta(dptr & ~7, ASI_SX, SX_STB(32, 31, dptr & 7));
+ sxm(SX_LDB, sptr, 32, 31);
+ sxm(SX_STB, dptr, 32, 31);
sptr += 32;
dptr += 32;
cnt -= 32;
}
if (cnt > 0) {
- sta(sptr & ~7, ASI_SX,
- SX_LDB(32, cnt - 1, sptr & 7));
- sta(dptr & ~7, ASI_SX,
- SX_STB(32, cnt - 1, dptr & 7));
+ sxm(SX_LDB, sptr, 32, cnt - 1);
+ sxm(SX_STB, dptr, 32, cnt - 1);
}
saddr += skip;
daddr += skip;
@@ -1444,22 +1451,22 @@ cg14_bitblt_gc(void *cookie, int xs, int
for (line = 0; line < he; line++) {
/* read source line, in all quads */
- sta(saddr & ~7, ASI_SX, SX_LDUQ0(8, swi - 1, saddr & 7));
+ sxm(SX_LDUQ0, saddr, 8, swi - 1);
/* now write it out */
dd = daddr;
r = dreg;
if (in > 0) {
- sta(dd & ~7, ASI_SX, SX_STB(r, in - 1, dd & 7));
+ sxm(SX_STB, dd, r, in - 1);
dd += in;
r += in;
}
if (q > 0) {
- sta(dd & ~7, ASI_SX, SX_STUQ0(r, q - 1, dd & 7));
+ sxm(SX_STUQ0, dd, r, q - 1);
r += q << 2;
dd += q << 2;
}
if (out > 0) {
- sta(dd & ~7, ASI_SX, SX_STB(r, out - 1, dd & 7));
+ sxm(SX_STB, dd, r, out - 1);
}
saddr += stride;
daddr += stride;
@@ -1518,7 +1525,7 @@ cg14_putchar(void *cookie, int row, int
for (i = 0; i < he; i++) {
reg = *data8;
cg14_set_mask(sc, reg << 24);
- sta(addr & ~7, ASI_SX, SX_STBS(8, wi - 1, addr & 7));
+ sxm(SX_STBS, addr, 8, wi - 1);
data8++;
addr += stride;
}
@@ -1530,7 +1537,7 @@ cg14_putchar(void *cookie, int row, int
for (i = 0; i < he; i++) {
reg = *data16;
cg14_set_mask(sc, reg << 16);
- sta(addr & ~7, ASI_SX, SX_STBS(8, wi - 1, addr & 7));
+ sxm(SX_STBS, addr, 8, wi - 1);
data16++;
addr += stride;
}
@@ -1679,20 +1686,20 @@ cg14_putchar_aa(void *cookie, int row, i
cnt = wi;
if (in != 0) {
in = 4 - in; /* pixels to write until aligned */
- sta(next & ~7, ASI_SX, SX_STB(8, in - 1, next & 7));
+ sxm(SX_STB, next, 8, in - 1);
next += in;
reg = 8 + in;
cnt -= in;
}
q = cnt >> 2; /* number of writes we can do in quads */
if (q > 0) {
- sta(next & ~7, ASI_SX, SX_STUQ0(reg, q - 1, next & 7));
+ sxm(SX_STUQ0, next, reg, q - 1);
next += (q << 2);
cnt -= (q << 2);
reg += (q << 2);
}
if (cnt > 0) {
- sta(next & ~7, ASI_SX, SX_STB(reg, cnt - 1, next & 7));
+ sxm(SX_STB, next, reg, cnt - 1);
}
addr += stride;
diff -r f7f0a2fc9a87 -r e02bf481d729 sys/arch/sparc/dev/sx.c
--- a/sys/arch/sparc/dev/sx.c Mon Jul 03 09:40:29 2023 +0000
+++ b/sys/arch/sparc/dev/sx.c Wed Jul 05 16:09:50 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sx.c,v 1.5 2021/09/11 20:28:05 andvar Exp $ */
+/* $NetBSD: sx.c,v 1.5.4.1 2023/07/05 16:09:50 martin Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sx.c,v 1.5 2021/09/11 20:28:05 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sx.c,v 1.5.4.1 2023/07/05 16:09:50 martin Exp $");
#include "locators.h"
@@ -84,6 +84,7 @@ sx_attach(device_t parent, device_t self
sc->sc_dev = self;
sc->sc_tag = ma->ma_bustag;
sc->sc_uregs = ma->ma_paddr + 0x1000;
+ sc->sc_cnt = 0;
if (bus_space_map(sc->sc_tag, ma->ma_paddr, 0x1000, 0, &sc->sc_regh)) {
aprint_error_dev(self, "failed to map registers\n");
@@ -104,7 +105,7 @@ sx_attach(device_t parent, device_t self
sx_write(sc, SX_PAGE_BOUND_LOWER, 0xfc000000);
/* cg14 takes up the whole 64MB chunk */
sx_write(sc, SX_PAGE_BOUND_UPPER, 0xffffffff);
- sx_write(sc, SX_DIAGNOSTICS, 0);
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