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[src/trunk]: src/sys/dev/pci few more typos in the word "register", mainly s/...



details:   https://anonhg.NetBSD.org/src/rev/3f3449abd507
branches:  trunk
changeset: 374591:3f3449abd507
user:      andvar <andvar%NetBSD.org@localhost>
date:      Sat May 06 22:17:28 2023 +0000

description:
few more typos in the word "register", mainly s/resister/register/.
In one comment I assume that it was meant to be pull-up resistor.

diffstat:

 sys/arch/arm/at91/at91pioreg.h     |  6 +++---
 sys/arch/arm/s3c2xx0/s3c2440_i2s.c |  2 +-
 sys/arch/hppa/dev/viper.h          |  4 ++--
 sys/arch/sparc64/include/ctlreg.h  |  4 ++--
 sys/dev/cardbus/cardbusreg.h       |  4 ++--
 sys/dev/ic/cd18xxreg.h             |  4 ++--
 sys/dev/pci/pccbbreg.h             |  4 ++--
 7 files changed, 14 insertions(+), 14 deletions(-)

diffs (121 lines):

diff -r 22b439f78db8 -r 3f3449abd507 sys/arch/arm/at91/at91pioreg.h
--- a/sys/arch/arm/at91/at91pioreg.h    Sat May 06 21:53:26 2023 +0000
+++ b/sys/arch/arm/at91/at91pioreg.h    Sat May 06 22:17:28 2023 +0000
@@ -1,5 +1,5 @@
-/*     $Id: at91pioreg.h,v 1.2 2008/07/03 01:15:38 matt Exp $  */
-/*     $NetBSD: at91pioreg.h,v 1.2 2008/07/03 01:15:38 matt Exp $      */
+/*     $Id: at91pioreg.h,v 1.3 2023/05/06 22:17:28 andvar Exp $        */
+/*     $NetBSD: at91pioreg.h,v 1.3 2023/05/06 22:17:28 andvar Exp $    */
 
 /*
  * Copyright (c) 2007 Embedtronics Oy. All rights reserved.
@@ -58,6 +58,6 @@
 #define        PIO_OWER        0xA0U   /* A0: PIO Output Write Enable          */
 #define        PIO_OWDR        0xA4U   /* A4: PIO Output Write Disable         */
 #define        PIO_OWSR        0xA8U   /* A8: PIO Output Write Status Reg      */
-#define        PIO_VERSION     0xFCU   /* FC: version reqister (AT91SAM92xx)   */
+#define        PIO_VERSION     0xFCU   /* FC: version register (AT91SAM92xx)   */
 
 #endif /* _AT91GPIOREG_H_ */
diff -r 22b439f78db8 -r 3f3449abd507 sys/arch/arm/s3c2xx0/s3c2440_i2s.c
--- a/sys/arch/arm/s3c2xx0/s3c2440_i2s.c        Sat May 06 21:53:26 2023 +0000
+++ b/sys/arch/arm/s3c2xx0/s3c2440_i2s.c        Sat May 06 22:17:28 2023 +0000
@@ -156,7 +156,7 @@ s3c2440_i2s_init(struct s3c2440_i2s_soft
        reg = GPIO_SET_FUNC(reg, 4, 2);
        bus_space_write_4(sc->sc_iot, sc->sc_gpio_ioh, GPIO_PECON, reg);
 
-       /* Disable Pull-up resister for all I2S pins */
+       /* Disable Pull-up resistor for all I2S pins */
        reg = bus_space_read_4(sc->sc_iot, sc->sc_gpio_ioh, GPIO_PEUP);
 
        reg = GPIO_SET_DATA(reg, 0, 1);
diff -r 22b439f78db8 -r 3f3449abd507 sys/arch/hppa/dev/viper.h
--- a/sys/arch/hppa/dev/viper.h Sat May 06 21:53:26 2023 +0000
+++ b/sys/arch/hppa/dev/viper.h Sat May 06 22:17:28 2023 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: viper.h,v 1.2 2014/10/18 08:33:25 snj Exp $    */
+/*     $NetBSD: viper.h,v 1.3 2023/05/06 22:17:28 andvar Exp $ */
 
 /*     $OpenBSD: viper.h,v 1.2 1999/06/29 20:56:10 mickey Exp $        */
 
@@ -144,7 +144,7 @@ struct vi_trs {
 
 /*
 ** Viper also creates HPA registers for the graphics accelerator (Venom).
-** Venom has two sets of resisters; the User HPA contains registers that
+** Venom has two sets of registers; the User HPA contains registers that
 ** users are allowed to access, while the Supervisor HPA is only accessible
 ** by code running at the most priviliged level.  Both sets of registers
 ** are defined below.
diff -r 22b439f78db8 -r 3f3449abd507 sys/arch/sparc64/include/ctlreg.h
--- a/sys/arch/sparc64/include/ctlreg.h Sat May 06 21:53:26 2023 +0000
+++ b/sys/arch/sparc64/include/ctlreg.h Sat May 06 22:17:28 2023 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ctlreg.h,v 1.67 2019/11/13 10:06:38 nakayama Exp $ */
+/*     $NetBSD: ctlreg.h,v 1.68 2023/05/06 22:17:28 andvar Exp $ */
 
 /*
  * Copyright (c) 1996-2002 Eduardo Horvath
@@ -396,7 +396,7 @@
  * Interrupt registers.  This really gets hairy.
  */
 
-/* IRSR -- Interrupt Receive Status Ragister */
+/* IRSR -- Interrupt Receive Status Register */
 #define        ASI_IRSR        0x49
 #define        IRSR            0x00
 #define        IRSR_BUSY       0x020
diff -r 22b439f78db8 -r 3f3449abd507 sys/dev/cardbus/cardbusreg.h
--- a/sys/dev/cardbus/cardbusreg.h      Sat May 06 21:53:26 2023 +0000
+++ b/sys/dev/cardbus/cardbusreg.h      Sat May 06 22:17:28 2023 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cardbusreg.h,v 1.7 2011/08/01 11:20:27 drochner Exp $ */
+/*     $NetBSD: cardbusreg.h,v 1.8 2023/05/06 22:17:28 andvar Exp $ */
 
 /*
  * Copyright (c) 2001
@@ -31,7 +31,7 @@
 
 #include <dev/pci/pcivar.h>    /* for pcitag_t */
 
-/* Base Resisters */
+/* Base Registers */
 #define CARDBUS_CIS_REG    0x28
 #define CARDBUS_ROM_REG           0x30
 #  define CARDBUS_CIS_ASIMASK 0x07
diff -r 22b439f78db8 -r 3f3449abd507 sys/dev/ic/cd18xxreg.h
--- a/sys/dev/ic/cd18xxreg.h    Sat May 06 21:53:26 2023 +0000
+++ b/sys/dev/ic/cd18xxreg.h    Sat May 06 22:17:28 2023 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cd18xxreg.h,v 1.5 2022/12/30 20:25:56 andvar Exp $     */
+/*     $NetBSD: cd18xxreg.h,v 1.6 2023/05/06 22:17:28 andvar Exp $     */
 
 /*
  * Copyright (c) 1998, 2001 Matthew R. Green
@@ -259,7 +259,7 @@
 #define        CD18xx_RBR_RxD          0x40    /* last RxD input */
 #define        CD18xx_RBR_STARTHUNT    0x20    /* hunting for a start bit */
 
-/* bit rate period resisters */
+/* bit rate period registers */
 #define CD18xx_xBRPR_TPC       0x10    /* ticks per character */
 
 /* mode change register */
diff -r 22b439f78db8 -r 3f3449abd507 sys/dev/pci/pccbbreg.h
--- a/sys/dev/pci/pccbbreg.h    Sat May 06 21:53:26 2023 +0000
+++ b/sys/dev/pci/pccbbreg.h    Sat May 06 22:17:28 2023 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pccbbreg.h,v 1.16 2019/10/15 18:20:44 msaitoh Exp $    */
+/*     $NetBSD: pccbbreg.h,v 1.17 2023/05/06 22:17:28 andvar Exp $     */
 
 /*
  * Copyright (c) 1999 HAYAKAWA Koichi.  All rights reserved.
@@ -147,7 +147,7 @@
 
 
 /*
- * Special resister definition for Toshiba ToPIC95/97
+ * Special register definition for Toshiba ToPIC95/97
  * These values are borrowed from pcmcia-cs/Linux.
  */
 #define TOPIC_SOCKET_CTRL  0x90



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