[src/trunk]: src/sys/arch/evbmips/mipssim evbmips/mipssim: on mips64, probe f...

[he <he%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9e1d4b514092
branches:  trunk
changeset: 372810:9e1d4b514092
user:      he <he%NetBSD.org@localhost>
date:      Wed Dec 28 11:50:25 2022 +0000

description:
evbmips/mipssim: on mips64, probe for additional memory.

Probe for memory from above the ISA I/O hole and up to 16GB,
which acording to simonb@ is a somewhat arbitrary limit.

This makes it possible to specify e.g. "-m 2g" to qemu, and have
that memory be probed instead of being clamped to 508MB.

diffstat:

 sys/arch/evbmips/mipssim/machdep.c    |  41 +++++++++++++++++++++++++++++++---
 sys/arch/evbmips/mipssim/mipssimreg.h |  10 +++++++-
 2 files changed, 46 insertions(+), 5 deletions(-)

diffs (104 lines):

diff -r 3d76f164dfdd -r 9e1d4b514092 sys/arch/evbmips/mipssim/machdep.c
--- a/sys/arch/evbmips/mipssim/machdep.c        Wed Dec 28 11:40:35 2022 +0000
+++ b/sys/arch/evbmips/mipssim/machdep.c        Wed Dec 28 11:50:25 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.3 2021/11/16 06:44:40 simonb Exp $ */
+/* $NetBSD: machdep.c,v 1.4 2022/12/28 11:50:25 he Exp $ */
 
 /*-
  * Copyright (c) 2001,2021 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.3 2021/11/16 06:44:40 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.4 2022/12/28 11:50:25 he Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -229,6 +229,9 @@
        size_t addr;
        uint32_t *memptr;
        extern char end[];      /* XXX */
+#ifdef MIPS64
+       size_t highaddr;
+#endif
 
        l->l_addr = &dummypcb;
        memsize = roundup2(MIPS_KSEG0_TO_PHYS((uintptr_t)(end)), 1024 * 1024);
@@ -246,13 +249,43 @@
        }
        l->l_addr = NULL;
 
-       printf("Memory size: 0x%" PRIxPSIZE " (%" PRIdPSIZE " MB)\n",
-           memsize, memsize / 1024 / 1024);
        physmem = btoc(memsize);
 
        mem_clusters[0].start = PAGE_SIZE;
        mem_clusters[0].size = memsize - PAGE_SIZE;
        mem_cluster_cnt = 1;
+
+#ifdef _LP64
+       /* probe for more memory above ISA I/O "hole" */
+       l->l_addr = &dummypcb;
+
+       for (highaddr = addr = MIPSSIM_MORE_MEM_BASE;
+           addr < MIPSSIM_MORE_MEM_END;
+           addr += 1024 * 1024) {
+               memptr = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE,
+                                               addr - sizeof(*memptr));
+               if (badaddr(memptr, sizeof(uint32_t)) < 0)
+                       break;
+
+               highaddr = addr;
+#ifdef MEM_DEBUG
+               printf("probed %zd MB\n", (addr - MIPSSIM_MORE_MEM_BASE)
+                                       / 1024 * 1024);
+#endif
+       }
+       l->l_addr = NULL;
+
+       if (highaddr != MIPSSIM_MORE_MEM_BASE) {
+               mem_clusters[1].start = MIPSSIM_MORE_MEM_BASE;
+               mem_clusters[1].size = highaddr - MIPSSIM_MORE_MEM_BASE;
+               mem_cluster_cnt++;
+               physmem += btoc(mem_clusters[1].size);
+               memsize += mem_clusters[1].size;
+       }
+#endif /* _LP64 */
+
+       printf("Memory size: 0x%" PRIxPSIZE " (%" PRIdPSIZE " MB)\n",
+           memsize, memsize / 1024 / 1024);
 }
 
 void
diff -r 3d76f164dfdd -r 9e1d4b514092 sys/arch/evbmips/mipssim/mipssimreg.h
--- a/sys/arch/evbmips/mipssim/mipssimreg.h     Wed Dec 28 11:40:35 2022 +0000
+++ b/sys/arch/evbmips/mipssim/mipssimreg.h     Wed Dec 28 11:50:25 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mipssimreg.h,v 1.3 2021/02/16 15:06:30 simonb Exp $ */
+/* $NetBSD: mipssimreg.h,v 1.4 2022/12/28 11:50:25 he Exp $ */
 
 /*-
  * Copyright (c) 2021 The NetBSD Foundation, Inc.
@@ -37,6 +37,11 @@
  *     1fd0.0000        64kB   ISA IO space
  *     1fd1.0000        64kB   'ISA' VirtIO IO space (non standard)
  *
+ *     Additionally, mips64 probes for memory up to 16G:
+ *
+ *       2000.0000     memory, probed, up to
+ *     4.0000.0000     16GB somewhat arbitrarily, could probably be higher
+ *
  *     CPU interrupts
  *
  *      0      mipsnet
@@ -56,5 +61,8 @@
 #define MIPSSIM_DMA_PHYSBASE   0x00000000
 #define MIPSSIM_DMA_SIZE       (MIPSSIM_ISA_IO_BASE - MIPSSIM_DMA_BASE)
 
+#define MIPSSIM_MORE_MEM_BASE  0x20000000
+#define MIPSSIM_MORE_MEM_END   (16ULL * 1024 * 1024 * 1024) /* 16GB */
+
 #define VIRTIO_NUM_TRANSPORTS  32
 #define VIRTIO_STRIDE          512