[src/trunk]: src/sys/arch/riscv/include The supervisor status register is the...

[simonb <simonb%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/8e47ea7028e3
branches:  trunk
changeset: 372302:8e47ea7028e3
user:      simonb <simonb%NetBSD.org@localhost>
date:      Fri Nov 11 01:18:32 2022 +0000

description:
The supervisor status register is the native word width, not fixed
at 32 bits.

diffstat:

 sys/arch/riscv/include/sysreg.h |  18 +++++++++---------
 1 files changed, 9 insertions(+), 9 deletions(-)

diffs (47 lines):

diff -r b83bb0d61451 -r 8e47ea7028e3 sys/arch/riscv/include/sysreg.h
--- a/sys/arch/riscv/include/sysreg.h   Thu Nov 10 10:55:00 2022 +0000
+++ b/sys/arch/riscv/include/sysreg.h   Fri Nov 11 01:18:32 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sysreg.h,v 1.21 2022/11/08 13:47:09 simonb Exp $ */
+/* $NetBSD: sysreg.h,v 1.22 2022/11/11 01:18:32 simonb Exp $ */
 
 /*
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -177,18 +177,18 @@
 #define        SR_KERNEL       (SR_SIE | SR_UIE)
 #endif
 
-static inline uint32_t
+static inline register_t
 riscvreg_status_read(void)
 {
-       uint32_t __sr;
+       register_t __sr;
        __asm("csrr\t%0, sstatus" : "=r"(__sr));
        return __sr;
 }
 
-static inline uint32_t
-riscvreg_status_clear(uint32_t __mask)
+static inline register_t
+riscvreg_status_clear(register_t __mask)
 {
-       uint32_t __sr;
+       register_t __sr;
        if (__builtin_constant_p(__mask) && __mask < 0x20) {
                __asm("csrrci\t%0, sstatus, %1" : "=r"(__sr) : "i"(__mask));
        } else {
@@ -197,10 +197,10 @@
        return __sr;
 }
 
-static inline uint32_t
-riscvreg_status_set(uint32_t __mask)
+static inline register_t
+riscvreg_status_set(register_t __mask)
 {
-       uint32_t __sr;
+       register_t __sr;
        if (__builtin_constant_p(__mask) && __mask < 0x20) {
                __asm("csrrsi\t%0, sstatus, %1" : "=r"(__sr) : "i"(__mask));
        } else {