[src/trunk]: src/sys/arch/riscv/include whitepsace nit

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/642584b2cbf2
branches:  trunk
changeset: 372285:642584b2cbf2
user:      skrll <skrll%NetBSD.org@localhost>
date:      Tue Nov 08 12:48:28 2022 +0000

description:
whitepsace nit

diffstat:

 sys/arch/riscv/include/sysreg.h |  4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diffs (18 lines):

diff -r a351e372260c -r 642584b2cbf2 sys/arch/riscv/include/sysreg.h
--- a/sys/arch/riscv/include/sysreg.h   Tue Nov 08 09:30:11 2022 +0000
+++ b/sys/arch/riscv/include/sysreg.h   Tue Nov 08 12:48:28 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sysreg.h,v 1.18 2022/10/15 06:53:49 skrll Exp $ */
+/* $NetBSD: sysreg.h,v 1.19 2022/11/08 12:48:28 skrll Exp $ */
 
 /*
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -144,7 +144,7 @@
 
 /* Supervisor interrupt registers */
 /* ... interrupt pending register (sip) */
-                       /* Bit (XLEN-1)-10 is WIRI */
+                       /* Bit (XLEN-1) - 10 is WIRI */
 #define        SIP_SEIP        __BIT(9)
 #define        SIP_UEIP        __BIT(8)
                        /* Bit 7-6 is WIRI */