[src/trunk]: src/sys/dev/sdmmc Select DMA mode after programming the ADMA bas...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/a8e13dacf7b8
branches:  trunk
changeset: 372239:a8e13dacf7b8
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Wed Nov 02 10:38:04 2022 +0000

description:
Select DMA mode after programming the ADMA base address register(s).

The Arasan SDHCI 8.9a found in the Xilinx Zynq-7000 SoC requires this
sequence to avoid sporadic transfer errors.

diffstat:

 sys/dev/sdmmc/sdhc.c |  20 ++++++++++----------
 1 files changed, 10 insertions(+), 10 deletions(-)

diffs (48 lines):

diff -r f562519a1990 -r a8e13dacf7b8 sys/dev/sdmmc/sdhc.c
--- a/sys/dev/sdmmc/sdhc.c      Wed Nov 02 09:37:56 2022 +0000
+++ b/sys/dev/sdmmc/sdhc.c      Wed Nov 02 10:38:04 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: sdhc.c,v 1.116 2022/10/14 07:54:49 jmcneill Exp $      */
+/*     $NetBSD: sdhc.c,v 1.117 2022/11/02 10:38:04 jmcneill Exp $      */
 /*     $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $        */
 
 /*
@@ -23,7 +23,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.116 2022/10/14 07:54:49 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.117 2022/11/02 10:38:04 jmcneill Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_sdmmc.h"
@@ -1835,6 +1835,14 @@
                }
                bus_dmamap_sync(sc->sc_dmat, hp->adma_map, 0, PAGE_SIZE,
                    BUS_DMASYNC_PREWRITE);
+
+               const bus_addr_t desc_addr = hp->adma_map->dm_segs[0].ds_addr;
+               HWRITE4(hp, SDHC_ADMA_SYSTEM_ADDR, desc_addr & 0xffffffff);
+               if (ISSET(hp->flags, SHF_USE_ADMA2_64)) {
+                       HWRITE4(hp, SDHC_ADMA_SYSTEM_ADDR + 4,
+                           (uint64_t)desc_addr >> 32);
+               }
+
                if (ISSET(hp->sc->sc_flags, SDHC_FLAG_USDHC)) {
                        HCLR4(hp, SDHC_HOST_CTL, SDHC_USDHC_DMA_SELECT);
                        HSET4(hp, SDHC_HOST_CTL, SDHC_USDHC_DMA_SELECT_ADMA2);
@@ -1842,14 +1850,6 @@
                        HCLR1(hp, SDHC_HOST_CTL, SDHC_DMA_SELECT);
                        HSET1(hp, SDHC_HOST_CTL, SDHC_DMA_SELECT_ADMA2);
                }
-
-               const bus_addr_t desc_addr = hp->adma_map->dm_segs[0].ds_addr;
-
-               HWRITE4(hp, SDHC_ADMA_SYSTEM_ADDR, desc_addr & 0xffffffff);
-               if (ISSET(hp->flags, SHF_USE_ADMA2_64)) {
-                       HWRITE4(hp, SDHC_ADMA_SYSTEM_ADDR + 4,
-                           (uint64_t)desc_addr >> 32);
-               }
        } else if (ISSET(mode, SDHC_DMA_ENABLE) &&
            !ISSET(sc->sc_flags, SDHC_FLAG_EXTERNAL_DMA)) {
                if (ISSET(hp->sc->sc_flags, SDHC_FLAG_USDHC)) {