[src/trunk]: src/sys/dev/fdt Disable ADMA2 on the Arasan SDHCI 8.9A found in ...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/73c79da91869
branches:  trunk
changeset: 372227:73c79da91869
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Tue Nov 01 00:57:39 2022 +0000

description:
Disable ADMA2 on the Arasan SDHCI 8.9A found in the Xilinx Zinq-7000 due
to sporadic transfer errors until the root cause for the errors is found.
In the meantime, SDMA works fine on this platform.

diffstat:

 sys/dev/fdt/arasan_sdhc_fdt.c |  18 +++++++++++++-----
 1 files changed, 13 insertions(+), 5 deletions(-)

diffs (55 lines):

diff -r 547755700d3f -r 73c79da91869 sys/dev/fdt/arasan_sdhc_fdt.c
--- a/sys/dev/fdt/arasan_sdhc_fdt.c     Mon Oct 31 23:04:50 2022 +0000
+++ b/sys/dev/fdt/arasan_sdhc_fdt.c     Tue Nov 01 00:57:39 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: arasan_sdhc_fdt.c,v 1.11 2022/10/26 20:54:52 jmcneill Exp $ */
+/* $NetBSD: arasan_sdhc_fdt.c,v 1.12 2022/11/01 00:57:39 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: arasan_sdhc_fdt.c,v 1.11 2022/10/26 20:54:52 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arasan_sdhc_fdt.c,v 1.12 2022/11/01 00:57:39 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -53,8 +53,8 @@
 #define         RK3399_CORECFG_CLOCKMULTIPLIER         __BITS(7,0)
 
 enum arasan_sdhc_type {
-       AS_TYPE_GENERIC = 0,
        AS_TYPE_RK3399 = 1,
+       AS_TYPE_SDHCI_8_9A,
 };
 
 struct arasan_sdhc_softc {
@@ -78,7 +78,7 @@
          .value = AS_TYPE_RK3399 },
 
        { .compat = "arasan,sdhci-8.9a",
-         .value = AS_TYPE_GENERIC },
+         .value = AS_TYPE_SDHCI_8_9A },
 
        DEVICE_COMPAT_EOL
 };
@@ -296,8 +296,16 @@
                               SDHC_FLAG_32BIT_ACCESS |
                               SDHC_FLAG_USE_DMA |
                               SDHC_FLAG_STOP_WITH_TC;
-       if (bus_width == 8)
+       if (sc->sc_type == AS_TYPE_SDHCI_8_9A) {
+               /*
+                * Workaround for sporadic transfer errors on the Arasan SDHCI
+                * found in the Xilinx Zynq-7000 SoC.
+                */
+               sc->sc_base.sc_flags |= SDHC_FLAG_BROKEN_ADMA;
+       }
+       if (bus_width == 8) {
                sc->sc_base.sc_flags |= SDHC_FLAG_8BIT_MODE;
+       }
        sc->sc_base.sc_clkbase = clk_get_rate(sc->sc_clk_xin) / 1000;
        sc->sc_base.sc_vendor_bus_clock = arasan_sdhc_bus_clock_pre;
        sc->sc_base.sc_vendor_bus_clock_post = arasan_sdhc_bus_clock_post;