Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/arch Use "non-posted" instead of "strongly ordered" to d...



details:   https://anonhg.NetBSD.org/src/rev/01e09e42e2a9
branches:  trunk
changeset: 371863:01e09e42e2a9
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sat Oct 15 11:07:38 2022 +0000

description:
Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings

Rename the following defines:
 - _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
 - PMAP_DEV_SO to PMAP_DEV_NP
 - LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
 - AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED

diffstat:

 sys/arch/aarch64/aarch64/bus_space.c         |   8 ++++----
 sys/arch/aarch64/aarch64/db_interface.c      |   8 ++++----
 sys/arch/aarch64/aarch64/locore.S            |  10 +++++-----
 sys/arch/aarch64/aarch64/pmap.c              |  10 +++++-----
 sys/arch/aarch64/conf/files.aarch64          |   4 ++--
 sys/arch/aarch64/include/pmap.h              |   8 ++++----
 sys/arch/arm/acpi/acpi_machdep.c             |   6 +++---
 sys/arch/arm/acpi/acpi_pci_graviton.c        |   6 +++---
 sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c |   8 ++++----
 sys/arch/arm/acpi/acpi_pci_n1sdp.c           |   6 +++---
 sys/arch/arm/acpi/acpipchb.c                 |   6 +++---
 sys/arch/arm/apple/apple_platform.c          |   8 ++++----
 sys/arch/arm/broadcom/bcm2838_pcie.c         |   6 +++---
 sys/arch/arm/fdt/pcihost_fdt.c               |   8 ++++----
 sys/arch/arm/include/bus_defs.h              |   4 ++--
 sys/arch/arm/nvidia/tegra_pcie.c             |   8 ++++----
 sys/arch/arm/rockchip/rk3399_pcie.c          |   6 +++---
 sys/arch/evbarm/fdt/fdt_bus_machdep.c        |   6 +++---
 18 files changed, 63 insertions(+), 63 deletions(-)

diffs (truncated from 528 to 300 lines):

diff -r 256d6bea731c -r 01e09e42e2a9 sys/arch/aarch64/aarch64/bus_space.c
--- a/sys/arch/aarch64/aarch64/bus_space.c      Sat Oct 15 10:45:40 2022 +0000
+++ b/sys/arch/aarch64/aarch64/bus_space.c      Sat Oct 15 11:07:38 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.16 2021/04/14 05:43:09 ryo Exp $ */
+/* $NetBSD: bus_space.c,v 1.17 2022/10/15 11:07:38 jmcneill Exp $ */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.16 2021/04/14 05:43:09 ryo Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.17 2022/10/15 11:07:38 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -568,8 +568,8 @@
                pmapflags = PMAP_WRITE_COMBINE;
        else if ((flag & BUS_SPACE_MAP_CACHEABLE) != 0)
                pmapflags = PMAP_WRITE_BACK;
-       else if ((flag & _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED) != 0)
-               pmapflags = PMAP_DEV_SO;
+       else if ((flag & BUS_SPACE_MAP_NONPOSTED) != 0)
+               pmapflags = PMAP_DEV_NP;
        else
                pmapflags = PMAP_DEV;
 
diff -r 256d6bea731c -r 01e09e42e2a9 sys/arch/aarch64/aarch64/db_interface.c
--- a/sys/arch/aarch64/aarch64/db_interface.c   Sat Oct 15 10:45:40 2022 +0000
+++ b/sys/arch/aarch64/aarch64/db_interface.c   Sat Oct 15 11:07:38 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.19 2022/09/19 17:23:14 ryo Exp $ */
+/* $NetBSD: db_interface.c,v 1.20 2022/10/15 11:07:38 jmcneill Exp $ */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.19 2022/09/19 17:23:14 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.20 2022/10/15 11:07:38 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/types.h>
@@ -431,8 +431,8 @@
                case LX_BLKPAG_ATTR_DEVICE_MEM:
                        pr(", DEV");
                        break;
-               case LX_BLKPAG_ATTR_DEVICE_MEM_SO:
-                       pr(", DEV(SO)");
+               case LX_BLKPAG_ATTR_DEVICE_MEM_NP:
+                       pr(", DEV(NP)");
                        break;
                default:
                        pr(", ATTR(%lu)", __SHIFTOUT(pte, LX_BLKPAG_ATTR_INDX));
diff -r 256d6bea731c -r 01e09e42e2a9 sys/arch/aarch64/aarch64/locore.S
--- a/sys/arch/aarch64/aarch64/locore.S Sat Oct 15 10:45:40 2022 +0000
+++ b/sys/arch/aarch64/aarch64/locore.S Sat Oct 15 11:07:38 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.87 2022/08/23 05:31:12 ryo Exp $  */
+/*     $NetBSD: locore.S,v 1.88 2022/10/15 11:07:38 jmcneill Exp $     */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -38,14 +38,14 @@
 #include <aarch64/hypervisor.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.87 2022/08/23 05:31:12 ryo Exp $")
+RCSID("$NetBSD: locore.S,v 1.88 2022/10/15 11:07:38 jmcneill Exp $")
 
-#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
+#ifdef AARCH64_DEVICE_MEM_NONPOSTED
 #define        MAIR_DEVICE_MEM         MAIR_DEVICE_nGnRnE
 #else
 #define        MAIR_DEVICE_MEM         MAIR_DEVICE_nGnRE
 #endif
-#define        MAIR_DEVICE_MEM_SO      MAIR_DEVICE_nGnRnE
+#define        MAIR_DEVICE_MEM_NP      MAIR_DEVICE_nGnRnE
 
 /*#define DEBUG_LOCORE                 // debug print */
 /*#define DEBUG_LOCORE_PRINT_LOCK      // avoid mixing AP's output */
@@ -952,7 +952,7 @@
            __SHIFTIN(MAIR_NORMAL_NC, MAIR_ATTR1) |     \
            __SHIFTIN(MAIR_NORMAL_WT, MAIR_ATTR2) |     \
            __SHIFTIN(MAIR_DEVICE_MEM, MAIR_ATTR3) |    \
-           __SHIFTIN(MAIR_DEVICE_MEM_SO, MAIR_ATTR4))
+           __SHIFTIN(MAIR_DEVICE_MEM_NP, MAIR_ATTR4))
 
 #define VIRT_BIT       48
 
diff -r 256d6bea731c -r 01e09e42e2a9 sys/arch/aarch64/aarch64/pmap.c
--- a/sys/arch/aarch64/aarch64/pmap.c   Sat Oct 15 10:45:40 2022 +0000
+++ b/sys/arch/aarch64/aarch64/pmap.c   Sat Oct 15 11:07:38 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.c,v 1.139 2022/08/19 08:17:32 ryo Exp $   */
+/*     $NetBSD: pmap.c,v 1.140 2022/10/15 11:07:38 jmcneill Exp $      */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.139 2022/08/19 08:17:32 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.140 2022/10/15 11:07:38 jmcneill Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_cpuoptions.h"
@@ -882,7 +882,7 @@
        switch (pte & LX_BLKPAG_ATTR_MASK) {
        case LX_BLKPAG_ATTR_NORMAL_NC:
        case LX_BLKPAG_ATTR_DEVICE_MEM:
-       case LX_BLKPAG_ATTR_DEVICE_MEM_SO:
+       case LX_BLKPAG_ATTR_DEVICE_MEM_NP:
                coherency = true;
                break;
        }
@@ -1116,8 +1116,8 @@
        pte &= ~LX_BLKPAG_ATTR_MASK;
 
        switch (flags & (PMAP_CACHE_MASK|PMAP_DEV_MASK)) {
-       case PMAP_DEV_SO ... PMAP_DEV_SO | PMAP_CACHE_MASK:
-               pte |= LX_BLKPAG_ATTR_DEVICE_MEM_SO;    /* Device-nGnRnE */
+       case PMAP_DEV_NP ... PMAP_DEV_NP | PMAP_CACHE_MASK:
+               pte |= LX_BLKPAG_ATTR_DEVICE_MEM_NP;    /* Device-nGnRnE */
                break;
        case PMAP_DEV ... PMAP_DEV | PMAP_CACHE_MASK:
                pte |= LX_BLKPAG_ATTR_DEVICE_MEM;       /* Device-nGnRE */
diff -r 256d6bea731c -r 01e09e42e2a9 sys/arch/aarch64/conf/files.aarch64
--- a/sys/arch/aarch64/conf/files.aarch64       Sat Oct 15 10:45:40 2022 +0000
+++ b/sys/arch/aarch64/conf/files.aarch64       Sat Oct 15 11:07:38 2022 +0000
@@ -1,10 +1,10 @@
-#      $NetBSD: files.aarch64,v 1.38 2022/06/25 13:24:34 jmcneill Exp $
+#      $NetBSD: files.aarch64,v 1.39 2022/10/15 11:07:38 jmcneill Exp $
 
 defflag opt_cpuoptions.h       AARCH64_ALIGNMENT_CHECK
 defflag opt_cpuoptions.h       AARCH64_EL0_STACK_ALIGNMENT_CHECK
 defflag opt_cpuoptions.h       AARCH64_EL1_STACK_ALIGNMENT_CHECK
 defflag opt_cpuoptions.h       AARCH64_HAVE_L2CTLR
-defflag opt_cpuoptions.h       AARCH64_DEVICE_MEM_STRONGLY_ORDERED
+defflag opt_cpuoptions.h       AARCH64_DEVICE_MEM_NONPOSTED
 defflag opt_cpuoptions.h       ARMV81_HAFDBS
 
 defflag        opt_cputypes.h          CPU_ARMV8
diff -r 256d6bea731c -r 01e09e42e2a9 sys/arch/aarch64/include/pmap.h
--- a/sys/arch/aarch64/include/pmap.h   Sat Oct 15 10:45:40 2022 +0000
+++ b/sys/arch/aarch64/include/pmap.h   Sat Oct 15 11:07:38 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.52 2022/04/02 11:16:06 skrll Exp $ */
+/* $NetBSD: pmap.h,v 1.53 2022/10/15 11:07:38 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -188,7 +188,7 @@
 #define LX_BLKPAG_ATTR_NORMAL_NC       __SHIFTIN(1, LX_BLKPAG_ATTR_INDX)
 #define LX_BLKPAG_ATTR_NORMAL_WT       __SHIFTIN(2, LX_BLKPAG_ATTR_INDX)
 #define LX_BLKPAG_ATTR_DEVICE_MEM      __SHIFTIN(3, LX_BLKPAG_ATTR_INDX)
-#define LX_BLKPAG_ATTR_DEVICE_MEM_SO   __SHIFTIN(4, LX_BLKPAG_ATTR_INDX)
+#define LX_BLKPAG_ATTR_DEVICE_MEM_NP   __SHIFTIN(4, LX_BLKPAG_ATTR_INDX)
 #define LX_BLKPAG_ATTR_MASK            LX_BLKPAG_ATTR_INDX
 
 #define lxpde_pa(pde)          ((paddr_t)((pde) & LX_TBL_PA))
@@ -341,8 +341,8 @@
 
 #define        PMAP_PTE                        0x10000000 /* kenter_pa */
 #define        PMAP_DEV                        0x20000000 /* kenter_pa */
-#define        PMAP_DEV_SO                     0x40000000 /* kenter_pa */
-#define        PMAP_DEV_MASK                   (PMAP_DEV | PMAP_DEV_SO)
+#define        PMAP_DEV_NP                     0x40000000 /* kenter_pa */
+#define        PMAP_DEV_MASK                   (PMAP_DEV | PMAP_DEV_NP)
 
 static inline u_int
 aarch64_mmap_flags(paddr_t mdpgno)
diff -r 256d6bea731c -r 01e09e42e2a9 sys/arch/arm/acpi/acpi_machdep.c
--- a/sys/arch/arm/acpi/acpi_machdep.c  Sat Oct 15 10:45:40 2022 +0000
+++ b/sys/arch/arm/acpi/acpi_machdep.c  Sat Oct 15 11:07:38 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_machdep.c,v 1.25 2021/08/08 10:28:26 jmcneill Exp $ */
+/* $NetBSD: acpi_machdep.c,v 1.26 2022/10/15 11:07:38 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
 #include "pci.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.25 2021/08/08 10:28:26 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.26 2022/10/15 11:07:38 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -463,7 +463,7 @@
     bus_space_handle_t *bshp)
 {
        return arm_generic_bs_tag.bs_map(t, bpa, size,
-           flag | _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, bshp);
+           flag | BUS_SPACE_MAP_NONPOSTED, bshp);
 }
 #endif
 
diff -r 256d6bea731c -r 01e09e42e2a9 sys/arch/arm/acpi/acpi_pci_graviton.c
--- a/sys/arch/arm/acpi/acpi_pci_graviton.c     Sat Oct 15 10:45:40 2022 +0000
+++ b/sys/arch/arm/acpi/acpi_pci_graviton.c     Sat Oct 15 11:07:38 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_pci_graviton.c,v 1.4 2020/10/24 07:08:22 skrll Exp $ */
+/* $NetBSD: acpi_pci_graviton.c,v 1.5 2022/10/15 11:07:38 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018, 2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_pci_graviton.c,v 1.4 2020/10/24 07:08:22 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_pci_graviton.c,v 1.5 2022/10/15 11:07:38 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -121,7 +121,7 @@
        }
 
        error = bus_space_map(ap->ap_bst, mem->ar_base, mem->ar_length,
-           _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &ap->ap_conf_bsh);
+           BUS_SPACE_MAP_NONPOSTED, &ap->ap_conf_bsh);
        if (error != 0)
                return AE_NO_MEMORY;
 
diff -r 256d6bea731c -r 01e09e42e2a9 sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c
--- a/sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c      Sat Oct 15 10:45:40 2022 +0000
+++ b/sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c      Sat Oct 15 11:07:38 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_pci_layerscape_gen4.c,v 1.4 2020/06/17 06:45:09 thorpej Exp $ */
+/* $NetBSD: acpi_pci_layerscape_gen4.c,v 1.5 2022/10/15 11:07:38 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_pci_layerscape_gen4.c,v 1.4 2020/06/17 06:45:09 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_pci_layerscape_gen4.c,v 1.5 2022/10/15 11:07:38 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -272,7 +272,7 @@
        }
 
        error = bus_space_map(ap->ap_bst, mem->ar_base, mem->ar_length,
-           _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &bsh);
+           BUS_SPACE_MAP_NONPOSTED, &bsh);
        if (error != 0)
                return AE_NO_MEMORY;
 
@@ -282,7 +282,7 @@
        mutex_init(&pcie->lock, MUTEX_DEFAULT, IPL_HIGH);
 
        error = bus_space_map(ap->ap_bst, win_base, PCI_EXTCONF_SIZE,
-           _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &pcie->win_bsh);
+           BUS_SPACE_MAP_NONPOSTED, &pcie->win_bsh);
        if (error != 0)
                return AE_NO_MEMORY;
 
diff -r 256d6bea731c -r 01e09e42e2a9 sys/arch/arm/acpi/acpi_pci_n1sdp.c
--- a/sys/arch/arm/acpi/acpi_pci_n1sdp.c        Sat Oct 15 10:45:40 2022 +0000
+++ b/sys/arch/arm/acpi/acpi_pci_n1sdp.c        Sat Oct 15 11:07:38 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_pci_n1sdp.c,v 1.6 2020/10/24 07:08:22 skrll Exp $ */
+/* $NetBSD: acpi_pci_n1sdp.c,v 1.7 2022/10/15 11:07:38 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_pci_n1sdp.c,v 1.6 2020/10/24 07:08:22 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_pci_n1sdp.c,v 1.7 2022/10/15 11:07:38 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -166,7 +166,7 @@
                        panic("acpi_pci_n1sdp_init: couldn't get PCIe discovery table VA");
 
                error = bus_space_map(bst, n1sdp_data[ap->ap_seg]->rc_base_addr, PCI_EXTCONF_SIZE,
-                   _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &ap->ap_conf_bsh);
+                   BUS_SPACE_MAP_NONPOSTED, &ap->ap_conf_bsh);
                if (error != 0)
                        panic("acpi_pci_n1sdp_init: couldn't map segment %d", ap->ap_seg);
 
diff -r 256d6bea731c -r 01e09e42e2a9 sys/arch/arm/acpi/acpipchb.c
--- a/sys/arch/arm/acpi/acpipchb.c      Sat Oct 15 10:45:40 2022 +0000
+++ b/sys/arch/arm/acpi/acpipchb.c      Sat Oct 15 11:07:38 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: acpipchb.c,v 1.31 2022/10/14 22:10:15 jmcneill Exp $ */
+/* $NetBSD: acpipchb.c,v 1.32 2022/10/15 11:07:38 jmcneill Exp $ */



Home | Main Index | Thread Index | Old Index