[src/trunk]: src/sys/arch/arm/omap fix typos in chained/unchained mode defini...

[andvar <andvar%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/bb24ba34cad3
branches:  trunk
changeset: 371770:bb24ba34cad3
user:      andvar <andvar%NetBSD.org@localhost>
date:      Fri Oct 07 22:30:48 2022 +0000

description:
fix typos in chained/unchained mode definitions (s/CHANINED/CHAINED).
fix typo in comment s/32 bot/32-bit/.

diffstat:

 sys/arch/arm/omap/omapl1x_timer.c |  10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diffs (35 lines):

diff -r 0585e73efcd8 -r bb24ba34cad3 sys/arch/arm/omap/omapl1x_timer.c
--- a/sys/arch/arm/omap/omapl1x_timer.c Fri Oct 07 19:56:31 2022 +0000
+++ b/sys/arch/arm/omap/omapl1x_timer.c Fri Oct 07 22:30:48 2022 +0000
@@ -25,7 +25,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(0, "$NetBSD: omapl1x_timer.c,v 1.4 2022/02/12 17:09:43 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: omapl1x_timer.c,v 1.5 2022/10/07 22:30:48 andvar Exp $");
 
 #include "opt_timer.h"
 
@@ -117,9 +117,9 @@
 
 /* Timer modes */
 #define TGCR_TIMMODE_64BIT             0x0
-#define TGCR_TIMMODE_32BIT_UNCHANINED  0x1
+#define TGCR_TIMMODE_32BIT_UNCHAINED   0x1
 #define TGCR_TIMMODE_64BIT_WDOG                0x2
-#define TGCR_TIMMODE_32BIT_CHANINED    0x3
+#define TGCR_TIMMODE_32BIT_CHAINED     0x3
 #define TGCR_TIMMODE_SHIFT             2
 
 #define TGCR_RS_STOP           0x0
@@ -277,8 +277,8 @@
        if (intr)
                omapl1xtimer_prd_intr_enb(sc);
 
-       /* Set timers to 32 bot unchained mode */
-       val = TGCR_TIMMODE_32BIT_UNCHANINED << TGCR_TIMMODE_SHIFT;
+       /* Set timers to 32-bit unchained mode */
+       val = TGCR_TIMMODE_32BIT_UNCHAINED << TGCR_TIMMODE_SHIFT;
        bus_space_write_4(sc->sc_iot, sc->sc_ioh, TGCR, val);
 
        omapl1xtimer_start(sc);