[src/trunk]: src/sys/arch/powerpc/fpu Fix errors in calculation of intermedia...

[rin <rin%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/cf3a0daee45e
branches:  trunk
changeset: 369896:cf3a0daee45e
user:      rin <rin%NetBSD.org@localhost>
date:      Tue Sep 06 23:12:42 2022 +0000

description:
Fix errors in calculation of intermediate mantissa bits > 95.

NFC since this does not affect the final results; we do not
support any extended-precision formats at the moment (never?).

Taken from FreeBSD:
https://cgit.freebsd.org/src/commit/sys/powerpc/fpu/fpu_sqrt.c?id=81dd9c5e69a2709ae3317dd383093e1c8a970d9e
except for stylistic changes that will be committed soon.

diffstat:

 sys/arch/powerpc/fpu/fpu_sqrt.c |  12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diffs (47 lines):

diff -r 16710484beab -r cf3a0daee45e sys/arch/powerpc/fpu/fpu_sqrt.c
--- a/sys/arch/powerpc/fpu/fpu_sqrt.c   Tue Sep 06 23:07:53 2022 +0000
+++ b/sys/arch/powerpc/fpu/fpu_sqrt.c   Tue Sep 06 23:12:42 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu_sqrt.c,v 1.12 2022/09/06 23:00:43 rin Exp $ */
+/*     $NetBSD: fpu_sqrt.c,v 1.13 2022/09/06 23:12:42 rin Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.12 2022/09/06 23:00:43 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.13 2022/09/06 23:12:42 rin Exp $");
 
 #include <sys/types.h>
 #if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -380,16 +380,16 @@
        bit = 1 << 31;
        EVEN_DOUBLE;
        t3 = bit;
-       FPU_SUBS(d3, x3, t3); __USE(d3);
+       FPU_SUBS(d3, x3, t3);
        FPU_SUBCS(d2, x2, t2);
        FPU_SUBCS(d1, x1, t1);
        FPU_SUBC(d0, x0, t0);
-       ODD_DOUBLE;
        if ((int)d0 >= 0) {
-               x0 = d0, x1 = d1, x2 = d2;
+               x0 = d0, x1 = d1, x2 = d2; x3 = d3;
                q |= bit;
                y2 |= 1;
        }
+       ODD_DOUBLE;
        while ((bit >>= 1) != 0) {
                EVEN_DOUBLE;
                t3 = y3 | bit;
@@ -398,7 +398,7 @@
                FPU_SUBCS(d1, x1, t1);
                FPU_SUBC(d0, x0, t0);
                if ((int)d0 >= 0) {
-                       x0 = d0, x1 = d1, x2 = d2;
+                       x0 = d0, x1 = d1, x2 = d2; x3 = d3;
                        q |= bit;
                        y3 |= bit << 1;
                }