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[src/trunk]: src/sys/arch/powerpc/fpu Trailing white-space/TAB.



details:   https://anonhg.NetBSD.org/src/rev/69fbd63900c2
branches:  trunk
changeset: 369859:69fbd63900c2
user:      rin <rin%NetBSD.org@localhost>
date:      Sun Sep 04 13:32:14 2022 +0000

description:
Trailing white-space/TAB.

diffstat:

 sys/arch/powerpc/fpu/fpu_div.c |   6 +++---
 sys/arch/powerpc/fpu/fpu_emu.c |  16 ++++++++--------
 2 files changed, 11 insertions(+), 11 deletions(-)

diffs (95 lines):

diff -r 5c7e28435761 -r 69fbd63900c2 sys/arch/powerpc/fpu/fpu_div.c
--- a/sys/arch/powerpc/fpu/fpu_div.c    Sun Sep 04 13:18:33 2022 +0000
+++ b/sys/arch/powerpc/fpu/fpu_div.c    Sun Sep 04 13:32:14 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu_div.c,v 1.7 2022/09/01 06:10:58 rin Exp $ */
+/*     $NetBSD: fpu_div.c,v 1.8 2022/09/04 13:32:14 rin Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -45,7 +45,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.7 2022/09/01 06:10:58 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.8 2022/09/04 13:32:14 rin Exp $");
 
 #include <sys/types.h>
 #if defined(DIAGNOSTIC)||defined(DEBUG)
@@ -190,7 +190,7 @@
        }
        /*
         * Need to split the following out cause they generate different
-        * exceptions. 
+        * exceptions.
         */
        if (ISINF(x)) {
                if (x->fp_class == y->fp_class) {
diff -r 5c7e28435761 -r 69fbd63900c2 sys/arch/powerpc/fpu/fpu_emu.c
--- a/sys/arch/powerpc/fpu/fpu_emu.c    Sun Sep 04 13:18:33 2022 +0000
+++ b/sys/arch/powerpc/fpu/fpu_emu.c    Sun Sep 04 13:32:14 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu_emu.c,v 1.52 2022/09/04 13:18:33 rin Exp $ */
+/*     $NetBSD: fpu_emu.c,v 1.53 2022/09/04 13:32:14 rin Exp $ */
 
 /*
  * Copyright 2001 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.52 2022/09/04 13:18:33 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.53 2022/09/04 13:32:14 rin Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_ddb.h"
@@ -183,7 +183,7 @@
        printf("%s %c.%x %x %x %xE%d\n", class[fp->fp_class + 2],
                fp->fp_sign ? '-' : ' ',
                fp->fp_mant[0], fp->fp_mant[1],
-               fp->fp_mant[2], fp->fp_mant[3], 
+               fp->fp_mant[2], fp->fp_mant[3],
                fp->fp_exp);
 }
 #endif
@@ -376,7 +376,7 @@
                                size = sizeof(float);
                        }
                        update = (instr.i_x.i_xo & 0x20);
-                       
+
                        /* calculate EA of load/store */
                        ra = instr.i_x.i_ra;
                        rb = instr.i_x.i_rb;
@@ -424,7 +424,7 @@
                                        return (FAULT);
                                }
                        } else {
-                               DPRINTF(FPE_INSN, 
+                               DPRINTF(FPE_INSN,
                                        ("fpu_execute: Store DBL at %p\n",
                                                (void *)addr));
                                if (copyout(&fs->fpreg[rt], (void *)addr, size)) {
@@ -446,7 +446,7 @@
                                fpu_implode(fe, fp, FTYPE_DBL, &FR(rt));
                        }
                }
-               if (update) 
+               if (update)
                        tf->tf_fixreg[ra] = addr;
                /* Complete. */
                return (0);
@@ -485,11 +485,11 @@
 
                        case    OPC63_FRSP:
                                /*
-                                * Convert to single: 
+                                * Convert to single:
                                 *
                                 * PowerPC uses this to round a double
                                 * precision value to single precision,
-                                * but values in registers are always 
+                                * but values in registers are always
                                 * stored in double precision format.
                                 */
                                FPU_EMU_EVCNT_INCR(frsp);



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