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[src/netbsd-8]: src/sys/dev/pci Pull up the following revisions, requested by...



details:   https://anonhg.NetBSD.org/src/rev/bf08c7b5cb6d
branches:  netbsd-8
changeset: 368440:bf08c7b5cb6d
user:      martin <martin%NetBSD.org@localhost>
date:      Mon Jul 11 14:15:57 2022 +0000

description:
Pull up the following revisions, requested by msaitoh in ticket #1751:

        sys/dev/pci/if_wmreg.h                          1.122-1.125 via patch
        sys/dev/pci/if_wmvar.h                          1.48
        sys/dev/pci/if_wm.c                             1.719-1.720,1.722-1.725,
                                                        1.727-1.740 via patch

- wm_tick: Add missing splx(s) when not WM_MPSAFE.
- Print DMA range info if the system is booting in the verbose mode.
- Micro optimization:
  - Call m_freem(m) only if m0 == NULL.
  - Call wm_xxeof() only when limit > 0.
  - Don't set the more flag when there is no packet to process.
- No functional changes:
  - Call txeof first, then rxeof for the consistency.
  - Remove duplicated break.
  - Remove stray semicolons from struct declaration.
  - Fix value return from void function.
  - Use macros.
  - Modify comment.
  - KNF.

diffstat:

 sys/dev/pci/if_wm.c    |   344 ++++++-----
 sys/dev/pci/if_wmreg.h |  1399 ++++++++++++++++++++++++-----------------------
 sys/dev/pci/if_wmvar.h |    42 +-
 3 files changed, 909 insertions(+), 876 deletions(-)

diffs (truncated from 2846 to 300 lines):

diff -r 5b8c892ede9d -r bf08c7b5cb6d sys/dev/pci/if_wm.c
--- a/sys/dev/pci/if_wm.c       Fri Jun 17 15:33:02 2022 +0000
+++ b/sys/dev/pci/if_wm.c       Mon Jul 11 14:15:57 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_wm.c,v 1.508.4.44 2021/11/20 15:11:31 martin Exp $  */
+/*     $NetBSD: if_wm.c,v 1.508.4.45 2022/07/11 14:15:57 martin Exp $  */
 
 /*
  * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -39,21 +39,21 @@
 
   Copyright (c) 2001-2005, Intel Corporation
   All rights reserved.
- 
+
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
- 
+
    1. Redistributions of source code must retain the above copyright notice,
       this list of conditions and the following disclaimer.
- 
+
    2. Redistributions in binary form must reproduce the above copyright
       notice, this list of conditions and the following disclaimer in the
       documentation and/or other materials provided with the distribution.
- 
+
    3. Neither the name of the Intel Corporation nor the names of its
       contributors may be used to endorse or promote products derived from
       this software without specific prior written permission.
- 
+
   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -82,7 +82,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.508.4.44 2021/11/20 15:11:31 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.508.4.45 2022/07/11 14:15:57 martin Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_net_mpsafe.h"
@@ -319,9 +319,9 @@
 #endif
 
 #ifdef WM_EVENT_COUNTERS
-#define WM_Q_EVCNT_DEFINE(qname, evname)                               \
+#define WM_Q_EVCNT_DEFINE(qname, evname)                                \
        char qname##_##evname##_evcnt_name[sizeof("qname##XX##evname")]; \
-       struct evcnt qname##_ev_##evname;
+       struct evcnt qname##_ev_##evname
 
 #define WM_Q_EVCNT_ATTACH(qname, evname, q, qnum, xname, evtype)       \
        do {                                                            \
@@ -340,7 +340,7 @@
        WM_Q_EVCNT_ATTACH(qname, evname, q, qnum, xname, EVCNT_TYPE_INTR)
 
 #define WM_Q_EVCNT_DETACH(qname, evname, q, qnum)      \
-       evcnt_detach(&(q)->qname##_ev_##evname);
+       evcnt_detach(&(q)->qname##_ev_##evname)
 #endif /* WM_EVENT_COUNTERS */
 
 struct wm_txqueue {
@@ -407,27 +407,27 @@
        uint32_t txq_bytes;             /* for AIM */
 #ifdef WM_EVENT_COUNTERS
        /* TX event counters */
-       WM_Q_EVCNT_DEFINE(txq, txsstall)    /* Stalled due to no txs */
-       WM_Q_EVCNT_DEFINE(txq, txdstall)    /* Stalled due to no txd */
-       WM_Q_EVCNT_DEFINE(txq, fifo_stall)  /* FIFO stalls (82547) */
-       WM_Q_EVCNT_DEFINE(txq, txdw)        /* Tx descriptor interrupts */
-       WM_Q_EVCNT_DEFINE(txq, txqe)        /* Tx queue empty interrupts */
+       WM_Q_EVCNT_DEFINE(txq, txsstall);   /* Stalled due to no txs */
+       WM_Q_EVCNT_DEFINE(txq, txdstall);   /* Stalled due to no txd */
+       WM_Q_EVCNT_DEFINE(txq, fifo_stall); /* FIFO stalls (82547) */
+       WM_Q_EVCNT_DEFINE(txq, txdw);       /* Tx descriptor interrupts */
+       WM_Q_EVCNT_DEFINE(txq, txqe);       /* Tx queue empty interrupts */
                                            /* XXX not used? */
 
-       WM_Q_EVCNT_DEFINE(txq, ipsum)       /* IP checksums comp. */
-       WM_Q_EVCNT_DEFINE(txq, tusum)       /* TCP/UDP cksums comp. */
-       WM_Q_EVCNT_DEFINE(txq, tusum6)      /* TCP/UDP v6 cksums comp. */
-       WM_Q_EVCNT_DEFINE(txq, tso)         /* TCP seg offload (IPv4) */
-       WM_Q_EVCNT_DEFINE(txq, tso6)        /* TCP seg offload (IPv6) */
-       WM_Q_EVCNT_DEFINE(txq, tsopain)     /* Painful header manip. for TSO */
-       WM_Q_EVCNT_DEFINE(txq, pcqdrop)     /* Pkt dropped in pcq */
-       WM_Q_EVCNT_DEFINE(txq, descdrop)    /* Pkt dropped in MAC desc ring */
+       WM_Q_EVCNT_DEFINE(txq, ipsum);      /* IP checksums comp. */
+       WM_Q_EVCNT_DEFINE(txq, tusum);      /* TCP/UDP cksums comp. */
+       WM_Q_EVCNT_DEFINE(txq, tusum6);     /* TCP/UDP v6 cksums comp. */
+       WM_Q_EVCNT_DEFINE(txq, tso);        /* TCP seg offload (IPv4) */
+       WM_Q_EVCNT_DEFINE(txq, tso6);       /* TCP seg offload (IPv6) */
+       WM_Q_EVCNT_DEFINE(txq, tsopain);    /* Painful header manip. for TSO */
+       WM_Q_EVCNT_DEFINE(txq, pcqdrop);    /* Pkt dropped in pcq */
+       WM_Q_EVCNT_DEFINE(txq, descdrop);   /* Pkt dropped in MAC desc ring */
                                            /* other than toomanyseg */
 
-       WM_Q_EVCNT_DEFINE(txq, toomanyseg)  /* Pkt dropped(toomany DMA segs) */
-       WM_Q_EVCNT_DEFINE(txq, defrag)      /* m_defrag() */
-       WM_Q_EVCNT_DEFINE(txq, underrun)    /* Tx underrun */
-       WM_Q_EVCNT_DEFINE(txq, skipcontext) /* Tx skip wring cksum context */
+       WM_Q_EVCNT_DEFINE(txq, toomanyseg); /* Pkt dropped(toomany DMA segs) */
+       WM_Q_EVCNT_DEFINE(txq, defrag);     /* m_defrag() */
+       WM_Q_EVCNT_DEFINE(txq, underrun);   /* Tx underrun */
+       WM_Q_EVCNT_DEFINE(txq, skipcontext); /* Tx skip wrong cksum context */
 
        char txq_txseg_evcnt_names[WM_NTXSEGS][sizeof("txqXXtxsegXXX")];
        struct evcnt txq_ev_txseg[WM_NTXSEGS]; /* Tx packets w/ N segments */
@@ -529,7 +529,7 @@
                                         */
        bus_dma_tag_t sc_dmat;          /* bus DMA tag */
 
-       struct ethercom sc_ethercom;    /* ethernet common data */
+       struct ethercom sc_ethercom;    /* Ethernet common data */
        struct mii_data sc_mii;         /* MII/media information */
 
        pci_chipset_tag_t sc_pc;
@@ -1905,10 +1905,13 @@
        sc->sc_pc = pa->pa_pc;
        sc->sc_pcitag = pa->pa_tag;
 
-       if (pci_dma64_available(pa))
+       if (pci_dma64_available(pa)) {
+               aprint_verbose(", 64-bit DMA");
                sc->sc_dmat = pa->pa_dmat64;
-       else
+       } else {
+               aprint_verbose(", 32-bit DMA");
                sc->sc_dmat = pa->pa_dmat;
+       }
 
        sc->sc_pcidevid = PCI_PRODUCT(pa->pa_id);
        sc->sc_rev = PCI_REVISION(pci_conf_read(pc, pa->pa_tag,PCI_CLASS_REG));
@@ -2022,8 +2025,8 @@
                                aprint_error_dev(sc->sc_dev,
                                    "WARNING: I/O BAR at zero.\n");
                        } else if (pci_mapreg_map(pa, i, PCI_MAPREG_TYPE_IO,
-                                       0, &sc->sc_iot, &sc->sc_ioh,
-                                       NULL, &sc->sc_ios) == 0) {
+                           0, &sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_ios)
+                           == 0) {
                                sc->sc_flags |= WM_F_IOH_VALID;
                        } else
                                aprint_error_dev(sc->sc_dev,
@@ -2978,7 +2981,8 @@
        } else {
                ifp->if_start = wm_start;
                /*
-                * wm_transmit() has the same disadvantage as wm_transmit().
+                * wm_transmit() has the same disadvantages as wm_nq_transmit()
+                * described above.
                 */
                if (wm_is_using_multiqueue(sc))
                        ifp->if_transmit = wm_transmit;
@@ -3039,7 +3043,7 @@
                    ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING;
 
        /*
-        * We can perform TCPv4 and UDPv4 checkums in-bound.  Only
+        * We can perform TCPv4 and UDPv4 checksums in-bound.  Only
         * on i82543 and later.
         */
        if (sc->sc_type >= WM_T_82543) {
@@ -3066,13 +3070,11 @@
         * If we're a i82544 or greater (except i82547), we can do
         * TCP segmentation offload.
         */
-       if (sc->sc_type >= WM_T_82544 && sc->sc_type != WM_T_82547) {
+       if (sc->sc_type >= WM_T_82544 && sc->sc_type != WM_T_82547)
                ifp->if_capabilities |= IFCAP_TSOv4;
-       }
-
-       if (sc->sc_type >= WM_T_82571) {
+
+       if (sc->sc_type >= WM_T_82571)
                ifp->if_capabilities |= IFCAP_TSOv6;
-       }
 
        sc->sc_tx_process_limit = WM_TX_PROCESS_LIMIT_DEFAULT;
        sc->sc_tx_intr_process_limit = WM_TX_INTR_PROCESS_LIMIT_DEFAULT;
@@ -3429,10 +3431,10 @@
            + CSR_READ(sc, WMREG_CEXTERR)
            + CSR_READ(sc, WMREG_RLEC);
        /*
-        * WMREG_RNBC is incremented when there is no available buffers in host
-        * memory. It does not mean the number of dropped packet. Because
-        * ethernet controller can receive packets in such case if there is
-        * space in phy's FIFO.
+        * WMREG_RNBC is incremented when there are no available buffers in host
+        * memory. It does not mean the number of dropped packets, because an
+        * Ethernet controller can receive packets in such case if there is
+        * space in the phy's FIFO.
         *
         * If you want to know the nubmer of WMREG_RMBC, you should use such as
         * own EVCNT instead of if_iqdrops.
@@ -3448,6 +3450,9 @@
                wm_tbi_tick(sc);
 
        WM_CORE_UNLOCK(sc);
+#ifndef WM_MPSAFE
+       splx(s);
+#endif
 
        wm_watchdog(ifp);
 
@@ -4809,7 +4814,7 @@
         * Remove all descriptors from the tx_ring.
         *
         * We want to clear all pending descriptors from the TX ring. Zeroing
-        * happens when the HW reads the regs. We  assign the ring itself as
+        * happens when the HW reads the regs. We assign the ring itself as
         * the data of the next descriptor. We don't care about the data we are
         * about to reset the HW.
         */
@@ -4979,7 +4984,7 @@
                }
                if (timeout == 0)
                        device_printf(sc->sc_dev,
-                           "failed to disable busmastering\n");
+                           "failed to disable bus mastering\n");
        }
 
        /* Set the completion timeout for interface */
@@ -5500,8 +5505,8 @@
                hw_nrxqueues = 2;
                break;
                /*
-                * As below ethernet controllers does not support MSI-X,
-                * this driver let them not use multiqueue.
+                * The below Ethernet controllers do not support MSI-X;
+                * this driver doesn't let them use multiqueue.
                 *     - WM_T_80003
                 *     - WM_T_ICH8
                 *     - WM_T_ICH9
@@ -5528,7 +5533,7 @@
                sc->sc_nqueues = hw_nqueues;
 
        /*
-        * As queues more then cpus cannot improve scaling, we limit
+        * As queues more than CPUs cannot improve scaling, we limit
         * the number of queues used actually.
         */
        if (ncpu < sc->sc_nqueues)
@@ -5814,12 +5819,12 @@
 
 /*
  * TODO
- * Below dynamic calculation of itr is almost the same as linux igb,
+ * Below dynamic calculation of itr is almost the same as Linux igb,
  * however it does not fit to wm(4). So, we will have been disable AIM
  * until we will find appropriate calculation of itr.
  */
 /*
- * calculate interrupt interval value to be going to write register in
+ * Calculate interrupt interval value to be going to write register in
  * wm_itrs_writereg(). This function does not write ITR/EITR register.
  */
 static void
@@ -6123,7 +6128,7 @@
                 * 82574's EITR should be set same throttling value as ITR.
                 *
                 * For N interrupts/sec, set this value to:
-                * 1,000,000 / N in contrast to ITR throttoling value.
+                * 1,000,000 / N in contrast to ITR throttling value.
                 */
                sc->sc_itr_init = 450;
        } else if (sc->sc_type >= WM_T_82543) {
@@ -6234,7 +6239,7 @@
                        reg &= ~CTRL_EXT_LINK_MODE_MASK;
                        CSR_WRITE(sc, WMREG_CTRL_EXT, reg);
 
-                       /* Bypass RX and TX FIFO's */
+                       /* Bypass RX and TX FIFOs */
                        wm_kmrn_writereg(sc, KUMCTRLSTA_OFFSET_FIFO_CTRL,
                            KUMCTRLSTA_FIFO_CTRL_RX_BYPASS
                            | KUMCTRLSTA_FIFO_CTRL_TX_BYPASS);
@@ -6287,7 +6292,7 @@
                        CSR_WRITE(sc, WMREG_CTRL_EXT, reg);
 
                        /*
-                        * Workaround issue with spurious interrupts
+                        * Work around issue with spurious interrupts
                         * in MSI-X mode.
                         * At wm_initialize_hardware_bits(), sc_nintrs has not
                         * initialized yet. So re-initialize WMREG_RFCTL here.
@@ -6460,12 +6465,12 @@
                 */
        }
 
-       /* Set the VLAN ethernetype. */
+       /* Set the VLAN EtherType. */
        CSR_WRITE(sc, WMREG_VET, ETHERTYPE_VLAN);
 
        /*
         * Set up the transmit control register; we start out with
-        * a collision distance suitable for FDX, but update it whe
+        * a collision distance suitable for FDX, but update it when



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