[src/trunk]: src/sys/dev Add CVPM02 BBU support.

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/1e7e2d885ef1
branches:  trunk
changeset: 368214:1e7e2d885ef1
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Wed Jun 29 13:03:20 2022 +0000

description:
Add CVPM02 BBU support.

diffstat:

 sys/dev/ic/mfireg.h |  3 ++-
 sys/dev/pci/mfii.c  |  5 +++--
 2 files changed, 5 insertions(+), 3 deletions(-)

diffs (43 lines):

diff -r 768f8db79847 -r 1e7e2d885ef1 sys/dev/ic/mfireg.h
--- a/sys/dev/ic/mfireg.h       Wed Jun 29 12:45:25 2022 +0000
+++ b/sys/dev/ic/mfireg.h       Wed Jun 29 13:03:20 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mfireg.h,v 1.21 2022/05/12 12:05:04 msaitoh Exp $ */
+/* $NetBSD: mfireg.h,v 1.22 2022/06/29 13:03:20 msaitoh Exp $ */
 /* $OpenBSD: mfireg.h,v 1.24 2006/06/19 19:05:45 marco Exp $ */
 /*
  * Copyright (c) 2006 Marco Peereboom <marco%peereboom.us@localhost>
@@ -1267,6 +1267,7 @@
 #define MFI_BBU_TYPE_IBBU      1
 #define MFI_BBU_TYPE_BBU       2
 #define MFI_BBU_TYPE_IBBU09    5
+#define MFI_BBU_TYPE_CVPM02    6
        uint8_t                 reserved;
        uint16_t                voltage; /* mV */
        int16_t                 current; /* mA */
diff -r 768f8db79847 -r 1e7e2d885ef1 sys/dev/pci/mfii.c
--- a/sys/dev/pci/mfii.c        Wed Jun 29 12:45:25 2022 +0000
+++ b/sys/dev/pci/mfii.c        Wed Jun 29 13:03:20 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mfii.c,v 1.19 2022/06/27 15:55:11 msaitoh Exp $ */
+/* $NetBSD: mfii.c,v 1.20 2022/06/29 13:03:20 msaitoh Exp $ */
 /* $OpenBSD: mfii.c,v 1.58 2018/08/14 05:22:21 jmatthew Exp $ */
 
 /*
@@ -19,7 +19,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mfii.c,v 1.19 2022/06/27 15:55:11 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mfii.c,v 1.20 2022/06/29 13:03:20 msaitoh Exp $");
 
 #include "bio.h"
 
@@ -3742,6 +3742,7 @@
        switch (bbu.battery_type) {
        case MFI_BBU_TYPE_IBBU:
        case MFI_BBU_TYPE_IBBU09:
+       case MFI_BBU_TYPE_CVPM02:
                mask = MFI_BBU_STATE_BAD_IBBU;
                soh_bad = 0;
                break;