[src/trunk]: src/sys/arch/arm/pic pic: splx performance improvement

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/e49e73b7fefb
branches:  trunk
changeset: 368133:e49e73b7fefb
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sat Jun 25 12:39:46 2022 +0000

description:
pic: splx performance improvement

Skip disabling interrupts and check for pending hard interrupts if old
ipl was < IPL_VM.

diffstat:

 sys/arch/arm/pic/pic_splfuncs.c |  29 +++++++++++++++++------------
 1 files changed, 17 insertions(+), 12 deletions(-)

diffs (51 lines):

diff -r c5d3daa8c4d4 -r e49e73b7fefb sys/arch/arm/pic/pic_splfuncs.c
--- a/sys/arch/arm/pic/pic_splfuncs.c   Sat Jun 25 08:19:01 2022 +0000
+++ b/sys/arch/arm/pic/pic_splfuncs.c   Sat Jun 25 12:39:46 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pic_splfuncs.c,v 1.22 2021/09/20 21:05:15 jmcneill Exp $       */
+/*     $NetBSD: pic_splfuncs.c,v 1.23 2022/06/25 12:39:46 jmcneill Exp $       */
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -31,7 +31,7 @@
 #include "opt_modular.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.22 2021/09/20 21:05:15 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.23 2022/06/25 12:39:46 jmcneill Exp $");
 
 #define _INTR_PRIVATE
 #include <sys/param.h>
@@ -97,17 +97,22 @@
                return;
        }
 
-       register_t psw = DISABLE_INTERRUPT_SAVE();
-       KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
-           "splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);
+       if (ci->ci_cpl >= IPL_VM) {
+               register_t psw = DISABLE_INTERRUPT_SAVE();
+               KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
+                   "splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);
 
-       ci->ci_intr_depth++;
-       pic_do_pending_ints(psw, savedipl, NULL);
-       ci->ci_intr_depth--;
-       KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
-           ci->ci_cpl, savedipl);
-       if ((psw & I32_bit) == 0)
-               ENABLE_INTERRUPT();
+               ci->ci_intr_depth++;
+               pic_do_pending_ints(psw, savedipl, NULL);
+               ci->ci_intr_depth--;
+               KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
+                   ci->ci_cpl, savedipl);
+               if ((psw & I32_bit) == 0)
+                       ENABLE_INTERRUPT();
+       } else {
+               pic_set_priority(ci, savedipl);
+       }
+
        cpu_dosoftints();
        KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
            ci->ci_cpl, savedipl);