Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/arch/aarch64/aarch64 Sprinkle isb after modifying system...



details:   https://anonhg.NetBSD.org/src/rev/72333195e01c
branches:  trunk
changeset: 365961:72333195e01c
user:      ryo <ryo%NetBSD.org@localhost>
date:      Fri May 06 06:09:50 2022 +0000

description:
Sprinkle isb after modifying system regs of pointer auth.
With options ARMV83_PAC, it now works on native Mac M1.

TODO: Multiple ISBs should be combined in one place.

diffstat:

 sys/arch/aarch64/aarch64/cpuswitch.S |  15 ++++++++++-----
 sys/arch/aarch64/aarch64/locore.S    |   6 ++++--
 sys/arch/aarch64/aarch64/vectors.S   |   6 ++++--
 3 files changed, 18 insertions(+), 9 deletions(-)

diffs (128 lines):

diff -r 92f1c18a5240 -r 72333195e01c sys/arch/aarch64/aarch64/cpuswitch.S
--- a/sys/arch/aarch64/aarch64/cpuswitch.S      Fri May 06 05:14:38 2022 +0000
+++ b/sys/arch/aarch64/aarch64/cpuswitch.S      Fri May 06 06:09:50 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.33 2021/03/09 16:44:27 ryo Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.34 2022/05/06 06:09:50 ryo Exp $ */
 
 /*-
  * Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
 #include "opt_ddb.h"
 #include "opt_kasan.h"
 
-RCSID("$NetBSD: cpuswitch.S,v 1.33 2021/03/09 16:44:27 ryo Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.34 2022/05/06 06:09:50 ryo Exp $")
 
        ARMV8_DEFINE_OPTIONS
 
@@ -115,6 +115,7 @@
        msr     APGAKeyLo_EL1, x5
        msr     APGAKeyHi_EL1, x6
 1:
+       isb
 #endif
 
        msr     tpidr_el1, x1           /* switch curlwp to new lwp */
@@ -202,6 +203,7 @@
        ldp     x5, x6, [x0, #L_MD_IA_KERN]
        msr     APIAKeyLo_EL1, x5
        msr     APIAKeyHi_EL1, x6
+       isb
 1:
 #endif
        ENABLE_INTERRUPT
@@ -235,6 +237,7 @@
        ldp     x5, x6, [x19, #L_MD_IA_KERN]
        msr     APIAKeyLo_EL1, x5
        msr     APIAKeyHi_EL1, x6
+       isb
 1:
 #endif
 
@@ -289,12 +292,14 @@
        ldr     w4, [x4]
        cbz     w4, 1f
        mov     x26, x1
+
        bl      _C_LABEL(cprng_strong64)
-       str     x0, [x26, #L_MD_IA_KERN]
-       msr     APIAKeyLo_EL1, x0
+       mov     x25, x0
        bl      _C_LABEL(cprng_strong64)
-       str     x0, [x26, #(L_MD_IA_KERN + 8)]
+       stp     x25, x0, [x26, #L_MD_IA_KERN]
+       msr     APIAKeyLo_EL1, x25
        msr     APIAKeyHi_EL1, x0
+       isb
 1:
 #endif
 
diff -r 92f1c18a5240 -r 72333195e01c sys/arch/aarch64/aarch64/locore.S
--- a/sys/arch/aarch64/aarch64/locore.S Fri May 06 05:14:38 2022 +0000
+++ b/sys/arch/aarch64/aarch64/locore.S Fri May 06 06:09:50 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.85 2022/01/31 09:16:09 ryo Exp $  */
+/*     $NetBSD: locore.S,v 1.86 2022/05/06 06:09:50 ryo Exp $  */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -38,7 +38,7 @@
 #include <aarch64/hypervisor.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.85 2022/01/31 09:16:09 ryo Exp $")
+RCSID("$NetBSD: locore.S,v 1.86 2022/05/06 06:09:50 ryo Exp $")
 
 #ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
 #define        MAIR_DEVICE_MEM         MAIR_DEVICE_nGnRnE
@@ -196,6 +196,7 @@
        ldr     x1, sctlr_pac
        orr     x0, x0, x1              /*  enable PAC */
        msr     sctlr_el1, x0
+       isb
 1:
 
        adrl    x19, cpu_info_store     /* curcpu (&cpu_info_store[0] */
@@ -565,6 +566,7 @@
        ldr     x1, sctlr_pac
        orr     x0, x0, x1              /*  enable PAC */
        msr     sctlr_el1, x0
+       isb
 1:
 
        mov     fp, xzr                 /* trace back starts here */
diff -r 92f1c18a5240 -r 72333195e01c sys/arch/aarch64/aarch64/vectors.S
--- a/sys/arch/aarch64/aarch64/vectors.S        Fri May 06 05:14:38 2022 +0000
+++ b/sys/arch/aarch64/aarch64/vectors.S        Fri May 06 06:09:50 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: vectors.S,v 1.25 2022/05/06 05:14:38 ryo Exp $ */
+/*     $NetBSD: vectors.S,v 1.26 2022/05/06 06:09:50 ryo Exp $ */
 
 #include <aarch64/asm.h>
 #include <aarch64/locore.h>
@@ -11,7 +11,7 @@
 #include "opt_dtrace.h"
 #include "opt_gic.h"
 
-RCSID("$NetBSD: vectors.S,v 1.25 2022/05/06 05:14:38 ryo Exp $")
+RCSID("$NetBSD: vectors.S,v 1.26 2022/05/06 06:09:50 ryo Exp $")
 
        ARMV8_DEFINE_OPTIONS
 
@@ -100,6 +100,7 @@
        ldp     x5, x6, [x1, #L_MD_IA_KERN]
        msr     APIAKeyLo_EL1, x5
        msr     APIAKeyHi_EL1, x6
+       isb
 1:
 #endif
        .endif
@@ -310,6 +311,7 @@
        ldp     x5, x6, [x9, #L_MD_IA_USER]
        msr     APIAKeyLo_EL1, x5
        msr     APIAKeyHi_EL1, x6
+       isb
 1:
 #endif
 



Home | Main Index | Thread Index | Old Index