[src/trunk]: src/sys/arch/x86/include Move CPUID_CAPEX_FLAGS next to %eax bec...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/001368b6c2ef
branches:  trunk
changeset: 359639:001368b6c2ef
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Sat Jan 15 09:58:23 2022 +0000

description:
Move CPUID_CAPEX_FLAGS next to %eax because it's for %eax.

diffstat:

 sys/arch/x86/include/specialreg.h |  12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diffs (33 lines):

diff -r 53af75c41183 -r 001368b6c2ef sys/arch/x86/include/specialreg.h
--- a/sys/arch/x86/include/specialreg.h Sat Jan 15 09:55:13 2022 +0000
+++ b/sys/arch/x86/include/specialreg.h Sat Jan 15 09:58:23 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: specialreg.h,v 1.183 2022/01/15 09:55:13 msaitoh Exp $ */
+/*     $NetBSD: specialreg.h,v 1.184 2022/01/15 09:58:23 msaitoh Exp $ */
 
 /*
  * Copyright (c) 2014-2020 The NetBSD Foundation, Inc.
@@ -797,11 +797,6 @@
 #define CPUID_CAPEX_VIRT_SSBD  __BIT(25)       /* Virt Spec Control SSBD */
 #define CPUID_CAPEX_SSB_NO     __BIT(26)       /* SSBD not required */
 
-/* %ecx */
-#define CPUID_CAPEX_PerfTscSize        __BITS(17,16)
-#define CPUID_CAPEX_ApicIdSize __BITS(15,12)
-#define CPUID_CAPEX_NC         __BITS(7,0)
-
 #define CPUID_CAPEX_FLAGS      "\20"                                    \
        "\1CLZERO"      "\2IRPERF"      "\3XSAVEERPTR"                   \
        "\5RDPRU"                       "\7B6"                           \
@@ -810,6 +805,11 @@
        "\21IBRS_ALWAYSON" "\22STIBP_ALWAYSON" "\23PREFER_IBRS" "\24B19" \
        "\31SSBD"       "\32VIRT_SSBD"  "\33SSB_NO"
 
+/* %ecx */
+#define CPUID_CAPEX_PerfTscSize        __BITS(17,16)
+#define CPUID_CAPEX_ApicIdSize __BITS(15,12)
+#define CPUID_CAPEX_NC         __BITS(7,0)
+
 /*
  * AMD SVM Revision and Feature.
  * CPUID Fn8000_000a