[src/trunk]: src/sys/arch/arm/sunxi add clock and reset for APB2 RSB on Allwi...

[jakllsch <jakllsch%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/82eff9d3f8bc
branches:  trunk
changeset: 1025534:82eff9d3f8bc
user:      jakllsch <jakllsch%NetBSD.org@localhost>
date:      Wed Nov 10 17:38:11 2021 +0000

description:
add clock and reset for APB2 RSB on Allwinner H6

diffstat:

 sys/arch/arm/sunxi/sun50i_h6_gpio.c  |  8 ++++----
 sys/arch/arm/sunxi/sun50i_h6_r_ccu.c |  6 ++++--
 sys/arch/arm/sunxi/sun50i_h6_r_ccu.h |  4 +++-
 3 files changed, 11 insertions(+), 7 deletions(-)

diffs (87 lines):

diff -r a80eb4e2eb2e -r 82eff9d3f8bc sys/arch/arm/sunxi/sun50i_h6_gpio.c
--- a/sys/arch/arm/sunxi/sun50i_h6_gpio.c       Wed Nov 10 17:35:45 2021 +0000
+++ b/sys/arch/arm/sunxi/sun50i_h6_gpio.c       Wed Nov 10 17:38:11 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i_h6_gpio.c,v 1.3 2021/11/08 17:58:27 jakllsch Exp $ */
+/* $NetBSD: sun50i_h6_gpio.c,v 1.4 2021/11/10 17:38:11 jakllsch Exp $ */
 
 /*-
  * Copyright (c) 2016 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sun50i_h6_gpio.c,v 1.3 2021/11/08 17:58:27 jakllsch Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sun50i_h6_gpio.c,v 1.4 2021/11/10 17:38:11 jakllsch Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -121,8 +121,8 @@
 };
 
 static const struct sunxi_gpio_pins h6_r_pins[] = {
-       { "PL0",   0, 0,  { "gpio_in", "gpio_out", NULL, "s_i2c", NULL, NULL, "irq" }, 6, 0 },
-       { "PL1",   0, 1,  { "gpio_in", "gpio_out", NULL, "s_i2c", NULL, NULL, "irq" }, 6, 1 },
+       { "PL0",   0, 0,  { "gpio_in", "gpio_out", "s_rsb", "s_i2c", NULL, NULL, "irq" }, 6, 0 },
+       { "PL1",   0, 1,  { "gpio_in", "gpio_out", "s_rsb", "s_i2c", NULL, NULL, "irq" }, 6, 1 },
        { "PL2",   0, 2,  { "gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, "irq" }, 6, 2 },
        { "PL3",   0, 3,  { "gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, "irq" }, 6, 3 },
        { "PL4",   0, 4,  { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, "irq" }, 6, 4 },
diff -r a80eb4e2eb2e -r 82eff9d3f8bc sys/arch/arm/sunxi/sun50i_h6_r_ccu.c
--- a/sys/arch/arm/sunxi/sun50i_h6_r_ccu.c      Wed Nov 10 17:35:45 2021 +0000
+++ b/sys/arch/arm/sunxi/sun50i_h6_r_ccu.c      Wed Nov 10 17:38:11 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i_h6_r_ccu.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */
+/* $NetBSD: sun50i_h6_r_ccu.c,v 1.3 2021/11/10 17:38:11 jakllsch Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: sun50i_h6_r_ccu.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun50i_h6_r_ccu.c,v 1.3 2021/11/10 17:38:11 jakllsch Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -63,6 +63,7 @@
        SUNXI_CCU_RESET(H6_R_RST_APB1_PWM, 0x13c, 16),
        SUNXI_CCU_RESET(H6_R_RST_APB2_UART, 0x18c, 16),
        SUNXI_CCU_RESET(H6_R_RST_APB2_I2C, 0x19c, 16),
+       SUNXI_CCU_RESET(H6_R_RST_APB2_RSB, 0x1bc, 16),
        SUNXI_CCU_RESET(H6_R_RST_APB1_IR, 0x1cc, 16),
        SUNXI_CCU_RESET(H6_R_RST_APB1_W1, 0x1ec, 16),
 };
@@ -102,6 +103,7 @@
        SUNXI_CCU_GATE(H6_R_CLK_APB1_PWM, "apb1-pwm", "apb1", 0x13c, 0),
        SUNXI_CCU_GATE(H6_R_CLK_APB2_UART, "apb2-uart", "apb2", 0x18c, 0),
        SUNXI_CCU_GATE(H6_R_CLK_APB2_I2C, "apb2-i2c", "apb2", 0x19c, 0),
+       SUNXI_CCU_GATE(H6_R_CLK_APB2_RSB, "apb2-rsb", "apb2", 0x1bc, 0),
        SUNXI_CCU_GATE(H6_R_CLK_APB1_IR, "apb1-ir", "apb1", 0x1cc, 0),
        SUNXI_CCU_GATE(H6_R_CLK_APB1_W1, "apb1-w1", "apb1", 0x1ec, 0),
 
diff -r a80eb4e2eb2e -r 82eff9d3f8bc sys/arch/arm/sunxi/sun50i_h6_r_ccu.h
--- a/sys/arch/arm/sunxi/sun50i_h6_r_ccu.h      Wed Nov 10 17:35:45 2021 +0000
+++ b/sys/arch/arm/sunxi/sun50i_h6_r_ccu.h      Wed Nov 10 17:38:11 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i_h6_r_ccu.h,v 1.1 2018/05/02 11:02:21 jmcneill Exp $ */
+/* $NetBSD: sun50i_h6_r_ccu.h,v 1.2 2021/11/10 17:38:11 jakllsch Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -36,6 +36,7 @@
 #define        H6_R_RST_APB2_I2C       4
 #define        H6_R_RST_APB1_IR        5
 #define        H6_R_RST_APB1_W1        6
+#define        H6_R_RST_APB2_RSB       7
 
 #define        H6_R_CLK_AR100          0
 #define        H6_R_CLK_AHB            1
@@ -50,5 +51,6 @@
 #define        H6_R_CLK_APB1_W1        10
 #define        H6_R_CLK_IR             11
 #define        H6_R_CLK_W1             12
+#define        H6_R_CLK_APB2_RSB       13
 
 #endif /* !_SUN50I_H6_R_CCU_H */