Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/riscv/include Fix riscv32 GENERIC build
details: https://anonhg.NetBSD.org/src/rev/80d41784b4b7
branches: trunk
changeset: 1023957:80d41784b4b7
user: skrll <skrll%NetBSD.org@localhost>
date: Tue Oct 05 07:05:40 2021 +0000
description:
Fix riscv32 GENERIC build
diffstat:
sys/arch/riscv/include/locore.h | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diffs (25 lines):
diff -r a4df1f0c8eb3 -r 80d41784b4b7 sys/arch/riscv/include/locore.h
--- a/sys/arch/riscv/include/locore.h Tue Oct 05 06:55:24 2021 +0000
+++ b/sys/arch/riscv/include/locore.h Tue Oct 05 07:05:40 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.8 2021/05/01 06:53:08 skrll Exp $ */
+/* $NetBSD: locore.h,v 1.9 2021/10/05 07:05:40 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -78,6 +78,7 @@
#define tf_t6 tf_reg[_X_T6]
};
+#ifdef _LP64
// For COMPAT_NETBSD32 coredumps
struct trapframe32 {
struct reg32 tf_regs;
@@ -85,6 +86,7 @@
register32_t tf_cause;
register32_t tf_sr;
};
+#endif
#define FB_A0 0
#define FB_RA 1
Home |
Main Index |
Thread Index |
Old Index