[src/trunk]: src/sys/arch/aarch64/aarch64 Add instruction barrier after write...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/be593642026e
branches:  trunk
changeset: 1023255:be593642026e
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Mon Aug 30 22:24:39 2021 +0000

description:
Add instruction barrier after write to mair_el1

diffstat:

 sys/arch/aarch64/aarch64/locore.S |  6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diffs (27 lines):

diff -r 4c601af1e5db -r be593642026e sys/arch/aarch64/aarch64/locore.S
--- a/sys/arch/aarch64/aarch64/locore.S Mon Aug 30 22:17:32 2021 +0000
+++ b/sys/arch/aarch64/aarch64/locore.S Mon Aug 30 22:24:39 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.78 2021/03/21 09:08:40 skrll Exp $        */
+/*     $NetBSD: locore.S,v 1.79 2021/08/30 22:24:39 jmcneill Exp $     */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -38,7 +38,7 @@
 #include <aarch64/hypervisor.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.78 2021/03/21 09:08:40 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.79 2021/08/30 22:24:39 jmcneill Exp $")
 
 #ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
 #define        MAIR_DEVICE_MEM         MAIR_DEVICE_nGnRnE
@@ -927,7 +927,7 @@
 
        ldr     x0, mair_setting
        msr     mair_el1, x0
-
+       isb
 
        /* TCR_EL1:IPS[34:32] = AA64MMFR0:PARange[3:0] */
        ldr     x0, tcr_setting