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[src/trunk]: src/sys/arch/arm/cortex Make gic_splfuncs optional and disable i...
details: https://anonhg.NetBSD.org/src/rev/8ec78c46f35c
branches: trunk
changeset: 1022873:8ec78c46f35c
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Tue Aug 10 17:12:31 2021 +0000
description:
Make gic_splfuncs optional and disable it by default until it has had
more testing.
diffstat:
sys/arch/arm/cortex/files.cortex | 8 ++++----
sys/arch/arm/cortex/gic.c | 12 +++++++++---
sys/arch/arm/cortex/gicv3.c | 10 ++++++++--
3 files changed, 21 insertions(+), 9 deletions(-)
diffs (119 lines):
diff -r 1853f83470c3 -r 8ec78c46f35c sys/arch/arm/cortex/files.cortex
--- a/sys/arch/arm/cortex/files.cortex Tue Aug 10 16:59:28 2021 +0000
+++ b/sys/arch/arm/cortex/files.cortex Tue Aug 10 17:12:31 2021 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.cortex,v 1.15 2021/08/10 15:33:09 jmcneill Exp $
+# $NetBSD: files.cortex,v 1.16 2021/08/10 17:12:31 jmcneill Exp $
defflag opt_cpu_in_cksum.h NEON_IN_CKSUM
@@ -11,16 +11,16 @@
attach armperiph at mainbus
file arch/arm/cortex/armperiph.c armperiph
-define gic_splfuncs
+defflag opt_gic.h GIC_SPLFUNCS
file arch/arm/cortex/gic_splfuncs.c gic_splfuncs
# ARM Generic Interrupt Controller (initially on Cortex-A9)
-device armgic: pic, pic_splfuncs, gic_splfuncs
+device armgic: pic, pic_splfuncs
attach armgic at mpcorebus
file arch/arm/cortex/gic.c armgic
# ARM Generic Interrupt Controller v3+
-device gicvthree: pic, pic_splfuncs, gic_splfuncs
+device gicvthree: pic, pic_splfuncs
file arch/arm/cortex/gicv3.c gicvthree
file arch/arm/cortex/gicv3_its.c gicvthree & pci & __have_pci_msi_msix
diff -r 1853f83470c3 -r 8ec78c46f35c sys/arch/arm/cortex/gic.c
--- a/sys/arch/arm/cortex/gic.c Tue Aug 10 16:59:28 2021 +0000
+++ b/sys/arch/arm/cortex/gic.c Tue Aug 10 17:12:31 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gic.c,v 1.48 2021/08/10 15:33:09 jmcneill Exp $ */
+/* $NetBSD: gic.c,v 1.49 2021/08/10 17:12:31 jmcneill Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -30,11 +30,12 @@
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
+#include "opt_gic.h"
#define _INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.48 2021/08/10 15:33:09 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.49 2021/08/10 17:12:31 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -50,8 +51,11 @@
#include <arm/locore.h>
#include <arm/cortex/gic_reg.h>
+#include <arm/cortex/mpcore_var.h>
+
+#ifdef GIC_SPLFUNCS
#include <arm/cortex/gic_splfuncs.h>
-#include <arm/cortex/mpcore_var.h>
+#endif
void armgic_irq_handler(void *);
@@ -730,7 +734,9 @@
"%u SGIs\n", priorities, sc->sc_gic_lines - ppis - sgis, ppis,
sgis);
+#ifdef GIC_SPLFUNCS
gic_spl_init();
+#endif
}
CFATTACH_DECL_NEW(armgic, 0,
diff -r 1853f83470c3 -r 8ec78c46f35c sys/arch/arm/cortex/gicv3.c
--- a/sys/arch/arm/cortex/gicv3.c Tue Aug 10 16:59:28 2021 +0000
+++ b/sys/arch/arm/cortex/gicv3.c Tue Aug 10 17:12:31 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.45 2021/08/10 15:33:09 jmcneill Exp $ */
+/* $NetBSD: gicv3.c,v 1.46 2021/08/10 17:12:31 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -27,11 +27,12 @@
*/
#include "opt_multiprocessor.h"
+#include "opt_gic.h"
#define _INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.45 2021/08/10 15:33:09 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.46 2021/08/10 17:12:31 jmcneill Exp $");
#include <sys/param.h>
#include <sys/kernel.h>
@@ -51,7 +52,10 @@
#include <arm/cortex/gicv3.h>
#include <arm/cortex/gic_reg.h>
+
+#ifdef GIC_SPLFUNCS
#include <arm/cortex/gic_splfuncs.h>
+#endif
#define PICTOSOFTC(pic) \
((void *)((uintptr_t)(pic) - offsetof(struct gicv3_softc, sc_pic)))
@@ -952,7 +956,9 @@
#endif
#endif
+#ifdef GIC_SPLFUNCS
gic_spl_init();
+#endif
return 0;
}
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