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[src/trunk]: src/sys/dev/pci regen.



details:   https://anonhg.NetBSD.org/src/rev/04d1bf4c6ccb
branches:  trunk
changeset: 998230:04d1bf4c6ccb
user:      mrg <mrg%NetBSD.org@localhost>
date:      Thu Apr 11 05:06:53 2019 +0000

description:
regen.

diffstat:

 sys/dev/pci/pcidevs.h      |    134 +-
 sys/dev/pci/pcidevs_data.h |  19621 +++++++++++++++++++++---------------------
 2 files changed, 10039 insertions(+), 9716 deletions(-)

diffs (truncated from 25975 to 300 lines):

diff -r 3f275fdb09b9 -r 04d1bf4c6ccb sys/dev/pci/pcidevs.h
--- a/sys/dev/pci/pcidevs.h     Thu Apr 11 04:59:49 2019 +0000
+++ b/sys/dev/pci/pcidevs.h     Thu Apr 11 05:06:53 2019 +0000
@@ -1,10 +1,10 @@
-/*     $NetBSD: pcidevs.h,v 1.1356 2019/03/08 03:44:46 msaitoh Exp $   */
+/*     $NetBSD: pcidevs.h,v 1.1357 2019/04/11 05:06:53 mrg Exp $       */
 
 /*
  * THIS FILE IS AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *     NetBSD: pcidevs,v 1.1367 2019/03/08 03:44:19 msaitoh Exp
+ *     NetBSD: pcidevs,v 1.1369 2019/04/11 04:59:49 mrg Exp
  */
 
 /*
@@ -1298,7 +1298,11 @@
 #define        PCI_PRODUCT_ASMEDIA_ASM1042     0x1042          /* ASM1042 USB 3.0 Host Controller */
 #define        PCI_PRODUCT_ASMEDIA_ASM1083     0x1080          /* ASM1083/1085 PCIe-PCI Bridge */
 #define        PCI_PRODUCT_ASMEDIA_ASM1042A    0x1142          /* ASM1042A USB 3.0 Host Controller */
+#define        PCI_PRODUCT_ASMEDIA_ASM1182     0x1182          /* ASM1182E PCIE Bridge Controller */
+#define        PCI_PRODUCT_ASMEDIA_ASM1184     0x1184          /* ASM1184E PCIE Bridge Controller */
 #define        PCI_PRODUCT_ASMEDIA_ASM1142     0x1242          /* ASM1142 USB 3.1 Host Controller */
+#define        PCI_PRODUCT_ASMEDIA_ASM1143     0x1343          /* ASM1143 USB 3.1 Host Controller */
+#define        PCI_PRODUCT_ASMEDIA_ASM2142     0x2142          /* ASM2142 USB 3.1 Host Controller */
 
 /* Asustek products */
 #define        PCI_PRODUCT_ASUSTEK_HFCPCI      0x0675          /* ISDN */
@@ -1732,14 +1736,33 @@
 #define        PCI_PRODUCT_ATI_RADEON_HD7340   0x9808          /* Radeon HD7340 Graphics */
 #define        PCI_PRODUCT_ATI_RADEON_HDMI_DP_AUDIO    0x9840          /* HDMI/DP Audio */
 #define        PCI_PRODUCT_ATI_RADEON_R2_R3_R3E_R4     0x9854          /* Radeon R2/R3/R4 Graphics */
-#define        PCI_PRODUCT_ATI_RADEON_HD2600_HD        0xaa08          /* Radeon HD2600 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD2900_HDA       0xaa00          /* Radeon HD 2900 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD3650_HDA       0xaa01          /* Radeon HD 3650/3730/3750 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD2600_HDA       0xaa08          /* Radeon HD 2600 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD2350_HDA       0xaa10          /* Radeon HD 2350PRO/2400PRO/2400XT/3410 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD3690_HDA       0xaa18          /* Radeon HD 3690/3800 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD36XX_HDA       0xaa20          /* Radeon HD 3650/3730/3750 HD Audio Controller */
 #define        PCI_PRODUCT_ATI_RADEON_HD34XX_HDA       0xaa28          /* Radeon HD 34xx HD Audio Controller */
-#define        PCI_PRODUCT_ATI_RADEON_HD4350_HD        0xaa38          /* Radeon HD4350 HD Audio Controller */
-#define        PCI_PRODUCT_ATI_RADEON_HD5600_HDMI      0xaa60          /* Redwood HDMI Audio */
-#define        PCI_PRODUCT_ATI_RADEON_HD54XX_HDA       0xaa68          /* Radeon HD 54xx Audio */
-#define        PCI_PRODUCT_ATI_RADEON_HD7700_HDA       0xaab0          /* Radeon HD 7700 HD Audio */
-#define        PCI_PRODUCT_ATI_RADEON_RX460_HDA        0xaae0          /* Radeon RX460 HD Audio */
-#define        PCI_PRODUCT_ATI_RADEON_RX470_HDA        0xaaf0          /* Radeon RX470 HD Audio */
+#define        PCI_PRODUCT_ATI_RADEON_HD4850_HDA       0xaa30          /* Radeon HD 4850 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD4350_HDA       0xaa38          /* Radeon HD 4350 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD5830_HDA       0xaa50          /* Radeon HD 5830/5850/5870/6850/6870 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD5700_HDA       0xaa58          /* Radeon HD 5700 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD5000_HDA       0xaa60          /* Radeon HD 5000 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD68XX_HDA       0xaa68          /* Radeon HD 5400/6300/7300 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD6930_HDA       0xaa80          /* Radeon HD 6930/6950/6970/6990 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD6790_HDA       0xaa88          /* Radeon HD 6790/6850/6870/7720 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD6500_HDA       0xaa90          /* Radeon HD 6500/6600/6700M HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD6450_HDA       0xaa98          /* Radeon HD 6450/7450/8450/8490, R5 230/235/235X HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD7870_HDA       0xaaa0          /* Radeon HD 7870XT/7950/7970 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_HD7700_HDA       0xaab0          /* Radeon HD 7700 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_R7_360_HDA       0xaac0          /* Radeon R7 360, R9 360 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_R9_290_HDA       0xaac8          /* Radeon R9 290/290X, 390/390X HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_R9_285_HDA       0xaad8          /* Radeon R9 285/380 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_RX_460_HDA       0xaae0          /* Radeon RX 460/550/640SP, RX 560/560X HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_RX_550_HDA       0xaae8          /* Radeon R9 Nano, FURY HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_RX_470_HDA       0xaaf0          /* Radeon RX 470/480/570/580/590 HD Audio Controller */
+#define        PCI_PRODUCT_ATI_RADEON_VEGA56_HDA       0xaaf8          /* Radeon Vega 56/64 */
+#define        PCI_PRODUCT_ATI_RADEON_RX_550_HDA2      0xab00          /* Radeon RX 550/640SP/560/560X HD Audio Controller */
 
 /* Auravision products */
 #define        PCI_PRODUCT_AURAVISION_VXP524   0x01f7          /* VxP524 PCI Video Processor */
@@ -2762,17 +2785,25 @@
 #define        PCI_PRODUCT_MARVELL_MV78460     0x7846          /* MV78460 SoC Armada XP */
 #define        PCI_PRODUCT_MARVELL_88W8660     0x8660          /* 88W8660 SoC Orion1 */
 
-#define        PCI_PRODUCT_MARVELL2_88SE9120   0x9120          /* 88SE9120 SATA */
-#define        PCI_PRODUCT_MARVELL2_88SE912X   0x9123          /* 88SE912[38] SATA II or III PCI-E AHCI Controller */
-#define        PCI_PRODUCT_MARVELL2_88SE9125   0x9125          /* 88SE9125 SATA III PCI-E AHCI Controller */
-#define        PCI_PRODUCT_MARVELL2_88SE9172   0x9172          /* 88SE9172 SATA */
-#define        PCI_PRODUCT_MARVELL2_88SE9182   0x9182          /* 88SE9182 SATA */
-#define        PCI_PRODUCT_MARVELL2_88SE9183   0x9183          /* 88SE9183 SATA */
-#define        PCI_PRODUCT_MARVELL2_88SE91XX   0x91a3          /* 88SE91XX SATA */
-#define        PCI_PRODUCT_MARVELL2_88SE9215   0x9215          /* 88SE9215 SATA */
-#define        PCI_PRODUCT_MARVELL2_88SE9220   0x9220          /* 88SE9220 SATA */
-#define        PCI_PRODUCT_MARVELL2_88SE9230   0x9230          /* 88SE9230 SATA */
-#define        PCI_PRODUCT_MARVELL2_88SE9235   0x9235          /* 88SE9235 SATA */
+#define        PCI_PRODUCT_MARVELL2_88SE9120   0x9120          /* 88SE9120 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE912X   0x9123          /* 88SE912[38] SATA II or III PCI-E Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9125   0x9125          /* 88SE9125 SATA III PCI-E Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9128   0x9128          /* 88SE9128 SATA III PCI-E Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9130   0x9130          /* 88SE9130 SATA III PCI-E Controller with HyperDuo */
+#define        PCI_PRODUCT_MARVELL2_88SE9172   0x9172          /* 88SE9172 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9170   0x9178          /* 88SE9170 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9172_2 0x917a          /* 88SE9170 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9182   0x9182          /* 88SE9182 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9183   0x9183          /* 88SE9183 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE91XX   0x91a3          /* 88SE91XX SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE912X_2 0x91a4          /* 88SE912X IDE Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9215   0x9215          /* 88SE9215 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9220   0x9220          /* 88SE9220 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9230   0x9230          /* 88SE9230 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9235   0x9235          /* 88SE9235 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9445   0x9445          /* 88SE9445 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9480   0x9480          /* 88SE9480 SATA Controller */
+#define        PCI_PRODUCT_MARVELL2_88SE9485   0x9485          /* 88SE9485 SATA Controller */
 
 /* Micro-star International Co Ltd */
 #define        PCI_PRODUCT_MSI_RT3090  0x891a          /* MIS RT3090 */
@@ -4377,26 +4408,40 @@
 #define        PCI_PRODUCT_INTEL_XE7_V4_QPI_LINK2      0x2f40          /* Xeon E7 v4 QPI Link 2 */
 #define        PCI_PRODUCT_INTEL_XE7_V4_RQPI_RING      0x2f41          /* Xeon E7 v4 QPI Ring Interface */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC1_MAIN      0x2f68          /* Xeon E5 v3 IMC Main */
+#define        PCI_PRODUCT_INTEL_XE5_V3_HA1    0x2f60          /* Xeon E7 v3/Xeon E5 v3/Core i7 Home Agent 1 */
+#define        PCI_PRODUCT_INTEL_XE5_V3_ICM1_TATRR     0x2f68          /* Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 1 Target Address, Thermal & RAS Registers */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC1_TADR1     0x2f6a          /* Xeon E5 v3 IMC Ch 0-1 Target Address Decode Registers */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC1_TADR2     0x2f6b          /* Xeon E5 v3 IMC Ch 0-1 Target Address Decode Registers */
 #define        PCI_PRODUCT_INTEL_XE7_V4_IMC1_TADR3     0x2f6c          /* Xeon E7 v4 IMC Ch 0-3 Target Address Decoder */
 #define        PCI_PRODUCT_INTEL_XE7_V4_IMC1_TADR4     0x2f6d          /* Xeon E7 v4 IMC Ch 0-3 Target Address Decoder */
+#define        PCI_PRODUCT_INTEL_XE5_V3_DDRIO_CHAN2    0x2f6e          /* Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Channel 2/3 Broadcast */
+#define        PCI_PRODUCT_INTEL_XE5_V3_DDRIO_BROAD2   0x2f6f          /* Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Global Broadcast */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_RAS       0x2f71          /* Xeon E5 v3 IMC RAS Registers */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC1_RAS       0x2f79          /* Xeon E5 v3 IMC Ras Registers */
 #define        PCI_PRODUCT_INTEL_XE5_V3_UBOX_2 0x2f7d          /* Xeon E5 v3 Scratchpad and Semaphores */
 #define        PCI_PRODUCT_INTEL_XE5_V3_QPI_LINK0      0x2f80          /* Xeon E5 v3 QPI Link 0 */
 #define        PCI_PRODUCT_INTEL_XE5_V3_RQPI_RING      0x2f81          /* Xeon E5 v3/Core i7-6xxxK QPI Ring Interface */
 #define        PCI_PRODUCT_INTEL_XE5_V3_QPI_LINK4      0x2f83          /* Xeon E5 v3 QPI Link 0 */
+#define        PCI_PRODUCT_INTEL_XE5_V3_QPIL0D1        0x2f85          /* Xeon E7 v3/Xeon E5 v3/Core i7 QPI Link 0 Debug */
+#define        PCI_PRODUCT_INTEL_XE5_V3_QPIL0D2        0x2f86          /* Xeon E7 v3/Xeon E5 v3/Core i7 QPI Link 0 Debug */
+#define        PCI_PRODUCT_INTEL_XE5_V3_QPIL0D3        0x2f87          /* Xeon E7 v3/Xeon E5 v3/Core i7 QPI Link 0 Debug */
+#define        PCI_PRODUCT_INTEL_XE5_V3_VCU1   0x2f88          /* Xeon E7 v3/Xeon E5 v3/Core i7 VCU */
+#define        PCI_PRODUCT_INTEL_XE5_V3_VCU2   0x2f8a          /* Xeon E7 v3/Xeon E5 v3/Core i7 VCU */
 #define        PCI_PRODUCT_INTEL_XE5_V3_QPI_LINK1      0x2f90          /* Xeon E5 v3 QPI Link 1 */
 #define        PCI_PRODUCT_INTEL_XE5_V3_PCU_1  0x2f98          /* Xeon E5 v3 Power Control Unit */
 #define        PCI_PRODUCT_INTEL_XE5_V3_PCU_2  0x2f99          /* Xeon E5 v3 Power Control Unit */
 #define        PCI_PRODUCT_INTEL_XE5_V3_PCU_3  0x2f9a          /* Xeon E5 v3 Power Control Unit */
 #define        PCI_PRODUCT_INTEL_XE5_V3_PCU_5  0x2f9c          /* Xeon E5 v3 Power Control Unit */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_MAIN      0x2fa8          /* Xeon E5 v3 IMC Main */
+#define        PCI_PRODUCT_INTEL_XE5_V3_HA0    0x2fa0          /* Xeon E7 v3/Xeon E5 v3/Core i7 Home Agent 0 */
+#define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_TATRR     0x2fa8          /* Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Target Address, Thermal & RAS Registers */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_TADR1     0x2faa          /* Xeon E5 v3 IMC Ch 0-1 Target Address Decode Registers */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_TADR2     0x2fab          /* Xeon E5 v3 IMC Ch 0-1 Target Address Decode Registers */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_TADR3     0x2fac          /* Xeon E5 v3 IMC Ch 2-3 Target Address Decode Registers */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_TADR4     0x2fad          /* Xeon E5 v3 IMC Ch 2-3 Target Address Decode Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_DDRIO_CHAN     0x2fae          /* Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Channel 0/1 Broadcast */
+#define        PCI_PRODUCT_INTEL_XE5_V3_DDRIO_BROAD    0x2faf          /* Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Global Broadcast */
+
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_REG1      0x2fb0          /* Xeon E5 v3 IMC Ch 0-1 Registers */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_REG2      0x2fb1          /* Xeon E5 v3 IMC Ch 0-1 Registers */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_REG3      0x2fb2          /* Xeon E5 v3 IMC Ch 2-3 Registers */
@@ -4426,6 +4471,38 @@
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_DDRIO_A   0x2fd9          /* Xeon E5 v3 IMC DDRIO */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_DDRIO_B   0x2fda          /* Xeon E5 v3 IMC DDRIO */
 #define        PCI_PRODUCT_INTEL_XE5_V3_IMC0_DDRIO_C   0x2fdb          /* Xeon E5 v3 IMC DDRIO */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG1        0x2fe0          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG2        0x2fe1          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG3        0x2fe2          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG4        0x2fe3          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG5        0x2fe4          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG6        0x2fe5          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG7        0x2fe6          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG8        0x2fe7          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG9        0x2fe8          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG10       0x2fe9          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG11       0x2fea          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG12       0x2feb          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG13       0x2fec          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG14       0x2fed          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG15       0x2fee          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG16       0x2fef          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG17       0x2ff0          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG18       0x2ff1          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG19       0x2ff2          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG20       0x2ff3          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG21       0x2ff4          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG22       0x2ff5          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG23       0x2ff6          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_UC_REG24       0x2ff7          /* Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_BRA1   0x2ff8          /* Xeon E7 v3/Xeon E5 v3/Core i7 Buffered Ring Agent */
+#define        PCI_PRODUCT_INTEL_XE5_V3_BRA2   0x2ff9          /* Xeon E7 v3/Xeon E5 v3/Core i7 Buffered Ring Agent */
+#define        PCI_PRODUCT_INTEL_XE5_V3_BRA3   0x2ffa          /* Xeon E7 v3/Xeon E5 v3/Core i7 Buffered Ring Agent */
+#define        PCI_PRODUCT_INTEL_XE5_V3_BRA4   0x2ffb          /* Xeon E7 v3/Xeon E5 v3/Core i7 Buffered Ring Agent */
+#define        PCI_PRODUCT_INTEL_XE5_V3_SADBR1 0x2ffc          /* Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_SADBR2 0x2ffd          /* Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers */
+#define        PCI_PRODUCT_INTEL_XE5_V3_SADBR3 0x2ffe          /* Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers */
+
 #define        PCI_PRODUCT_INTEL_WIFI_LINK_3165_1      0x3165          /* Dual Band Wireless AC 3165 */
 #define        PCI_PRODUCT_INTEL_WIFI_LINK_3165_2      0x3166          /* Dual Band Wireless AC 3165 */
 #define        PCI_PRODUCT_INTEL_GLK_IGD_1     0x3184          /* UHD Graphics 605 */
@@ -6505,9 +6582,23 @@
 #define        PCI_PRODUCT_NVIDIA_GEFORCE_610M2        0x1059          /* GeForce 610M */
 #define        PCI_PRODUCT_NVIDIA_GT610M       0x105A          /* GeForce GT 610M */
 #define        PCI_PRODUCT_NVIDIA_GF116        0x1244          /* GeForce GTX 550 Ti */
+#define        PCI_PRODUCT_NVIDIA_GF_GTX960    0x1401          /* GeForce GTX 960 */
+#define        PCI_PRODUCT_NVIDIA_GF_GTX950    0x1402          /* GeForce GTX 950 */
+#define        PCI_PRODUCT_NVIDIA_GF_GTX960_2  0x1406          /* GeForce GTX 960 */
+#define        PCI_PRODUCT_NVIDIA_GF_GTX750    0x1407          /* GeForce GTX 750 */
+#define        PCI_PRODUCT_NVIDIA_GF_GTX950_2  0x1427          /* GeForce GTX 950 */
+#define        PCI_PRODUCT_NVIDIA_QUADRO_M2000 0x1430          /* Quadro M2000 */
+#define        PCI_PRODUCT_NVIDIA_TESLA_M4     0x1431          /* Tesla M4 */
+#define        PCI_PRODUCT_NVIDIA_QUADRO_M2200 0x1436          /* Quadro M2200 */
+#define        PCI_PRODUCT_NVIDIA_QUADRO_GP100 0x15f0          /* Quadro GP100 */
 #define        PCI_PRODUCT_NVIDIA_TESLA_12G    0x15f7          /* Tesla P100 PCIe 12GB */
 #define        PCI_PRODUCT_NVIDIA_TESLA_16G    0x15f8          /* Tesla P100 PCIe 16GB */
 #define        PCI_PRODUCT_NVIDIA_TESLA_16G_SXM2       0x15f9          /* Tesla P100 SXM2 16GB */
+#define        PCI_PRODUCT_NVIDIA_GF_GTX980M   0x1617          /* GeForce GTX 965M */
+#define        PCI_PRODUCT_NVIDIA_GF_GTX970M   0x1618          /* GeForce GTX 965M */
+#define        PCI_PRODUCT_NVIDIA_GF_GTX965M   0x1619          /* GeForce GTX 965M */
+#define        PCI_PRODUCT_NVIDIA_GF_GTX980    0x161A          /* GeForce GTX 980 */
+#define        PCI_PRODUCT_NVIDIA_GF_GTX965M_2 0x1667          /* GeForce GTX 965M */
 #define        PCI_PRODUCT_NVIDIA_GF_TITAN_X   0x1b00          /* GeForce TITAN X */
 #define        PCI_PRODUCT_NVIDIA_GF_GTX1080_TI        0x1b06          /* GeForce GTX 1080 Ti */
 #define        PCI_PRODUCT_NVIDIA_QUADRO_P6000 0x1b30          /* Quadro P6000 */
@@ -6519,6 +6610,7 @@
 #define        PCI_PRODUCT_NVIDIA_GF_GTX1070M  0x1ba1          /* GeForce GTX 1070 Mobile */
 #define        PCI_PRODUCT_NVIDIA_QUADRO_P5000 0x1bb0          /* Quadro P5000 */
 #define        PCI_PRODUCT_NVIDIA_TESLA_P4     0x1bb3          /* Tesla P4 */
+#define        PCI_PRODUCT_NVIDIA_TESLA_P6     0x1bb4          /* Tesla P6 */
 #define        PCI_PRODUCT_NVIDIA_QUADRO_P5000M        0x1bb6          /* Quadro P5000 Mobile */
 #define        PCI_PRODUCT_NVIDIA_QUADRO_P4000M        0x1bb7          /* Quadro P4000 Mobile */
 #define        PCI_PRODUCT_NVIDIA_QUADRO_P3000M        0x1bb8          /* Quadro P3000 Mobile */
@@ -6534,10 +6626,8 @@
 #define        PCI_PRODUCT_NVIDIA_GF_GTX1050_Ti        0x1c82          /* GeForce GTX 1050 Ti */
 #define        PCI_PRODUCT_NVIDIA_GF_GTX1050_TiM       0x1c8c          /* GeForce GTX 1050 Ti Mobile */
 #define        PCI_PRODUCT_NVIDIA_GF_GTX1050_M 0x1c8d          /* GeForce GTX 1050 Mobile */
-
 #define        PCI_PRODUCT_NVIDIA_GF_GTX1030   0x1d01          /* GeForce GT 1030 */
 #define        PCI_PRODUCT_NVIDIA_GF_MX150     0x1d10          /* GeForce MX150 */
-
 #define        PCI_PRODUCT_NVIDIA_TITAN_V      0x1d81          /* GV100 TITAN V */
 #define        PCI_PRODUCT_NVIDIA_TESLA_V100SXM16      0x1db1          /* Tesla V100 SXM2 16GB */
 #define        PCI_PRODUCT_NVIDIA_TESLA_V100PCI16      0x1db4          /* Tesla V100 PCIe 16GB */
diff -r 3f275fdb09b9 -r 04d1bf4c6ccb sys/dev/pci/pcidevs_data.h
--- a/sys/dev/pci/pcidevs_data.h        Thu Apr 11 04:59:49 2019 +0000
+++ b/sys/dev/pci/pcidevs_data.h        Thu Apr 11 05:06:53 2019 +0000
@@ -1,10 +1,10 @@
-/*     $NetBSD: pcidevs_data.h,v 1.1355 2019/03/08 03:44:46 msaitoh Exp $      */
+/*     $NetBSD: pcidevs_data.h,v 1.1356 2019/04/11 05:06:53 mrg Exp $  */
 
 /*
  * THIS FILE IS AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *     NetBSD: pcidevs,v 1.1367 2019/03/08 03:44:19 msaitoh Exp
+ *     NetBSD: pcidevs,v 1.1369 2019/04/11 04:59:49 mrg Exp
  */
 
 /*
@@ -1741,1426 +1741,1472 @@
            9134, 9147, 6492, 0,
            PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1042A, 
            9156, 6874, 9130, 6882, 6384, 0,
+           PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1182, 
+           9165, 8102, 6492, 6384, 0,
+           PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1184, 
+           9174, 8102, 6492, 6384, 0,
            PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1142, 
-           9165, 6874, 9173, 6882, 6384, 0,
+           9183, 6874, 9191, 6882, 6384, 0,
+           PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1143, 
+           9195, 6874, 9191, 6882, 6384, 0,
+           PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM2142, 
+           9203, 6874, 9191, 6882, 6384, 0,
            PCI_VENDOR_ASUSTEK, PCI_PRODUCT_ASUSTEK_HFCPCI, 
-           9177, 0,
+           9211, 0,
            PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_ETHERNET_L1E, 
-           9182, 5638, 5646, 5838, 0,
+           9216, 5638, 5646, 5838, 0,
            PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_ETHERNET_GIGA, 
-           9186, 5638, 5646, 5838, 0,
+           9220, 5638, 5646, 5838, 0,
            PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8132, 
-           9189, 2439, 5646, 5838, 0,
+           9223, 2439, 5646, 5838, 0,
            PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8131, 
-           9196, 5638, 5646, 5838, 0,
+           9230, 5638, 5646, 5838, 0,
            PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8151, 
-           9203, 9210, 5638, 5646, 5838, 0,
+           9237, 9244, 5638, 5646, 5838, 0,
            PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8151_V2, 
-           9203, 9215, 5638, 5646, 5838, 0,
+           9237, 9249, 5638, 5646, 5838, 0,
            PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8162, 
-           9220, 0,
+           9254, 0,
            PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8161, 
-           9227, 0,
+           9261, 0,
            PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8172, 
-           9234, 0,
-           PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8171, 
-           9241, 0,
-           PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_ETHERNET_100, 
-           9248, 6071, 9251, 5646, 5838, 0,
-           PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8152_B, 
-           9256, 9263, 2439, 5646, 5838, 0,
-           PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8152_B2, 
-           9256, 9215, 2439, 5646, 5838, 0,
-           PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_E2200, 
            9268, 0,
+           PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8171, 



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