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[src/trunk]: src/sys/arch Start replacing the x86 PTE bits.
details: https://anonhg.NetBSD.org/src/rev/2cb295118662
branches: trunk
changeset: 997472:2cb295118662
user: maxv <maxv%NetBSD.org@localhost>
date: Sat Mar 09 08:42:25 2019 +0000
description:
Start replacing the x86 PTE bits.
diffstat:
sys/arch/amd64/amd64/db_disasm.c | 6 +-
sys/arch/amd64/amd64/gdt.c | 6 +-
sys/arch/amd64/amd64/locore.S | 36 ++--
sys/arch/amd64/amd64/machdep.c | 8 +-
sys/arch/amd64/include/asan.h | 10 +-
sys/arch/amd64/include/pte.h | 47 +++---
sys/arch/amd64/stand/prekern/locore.S | 30 ++--
sys/arch/amd64/stand/prekern/mm.c | 22 +-
sys/arch/i386/i386/db_disasm.c | 6 +-
sys/arch/i386/i386/gdt.c | 8 +-
sys/arch/i386/i386/genassym.cf | 4 +-
sys/arch/i386/i386/locore.S | 32 ++--
sys/arch/i386/i386/machdep.c | 8 +-
sys/arch/i386/include/pte.h | 44 ++---
sys/arch/usermode/usermode/db_memrw.c | 12 +-
sys/arch/x86/acpi/acpi_machdep.c | 8 +-
sys/arch/x86/include/pmap.h | 4 +-
sys/arch/x86/include/pmap_pv.h | 8 +-
sys/arch/x86/include/specialreg.h | 4 +-
sys/arch/x86/x86/cpu.c | 8 +-
sys/arch/x86/x86/db_memrw.c | 10 +-
sys/arch/x86/x86/kgdb_machdep.c | 6 +-
sys/arch/x86/x86/lapic.c | 6 +-
sys/arch/x86/x86/pmap.c | 230 +++++++++++++++++-----------------
sys/arch/x86/x86/svs.c | 8 +-
sys/arch/xen/x86/cpu.c | 14 +-
sys/arch/xen/x86/x86_xpmap.c | 36 ++--
sys/arch/xen/x86/xen_pmap.c | 12 +-
sys/arch/xen/xen/if_xennet_xenbus.c | 8 +-
sys/arch/xen/xen/xen_machdep.c | 6 +-
sys/arch/xen/xen/xennetback_xenbus.c | 10 +-
31 files changed, 323 insertions(+), 334 deletions(-)
diffs (truncated from 2200 to 300 lines):
diff -r 9dcb40a90bf8 -r 2cb295118662 sys/arch/amd64/amd64/db_disasm.c
--- a/sys/arch/amd64/amd64/db_disasm.c Sat Mar 09 07:53:12 2019 +0000
+++ b/sys/arch/amd64/amd64/db_disasm.c Sat Mar 09 08:42:25 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_disasm.c,v 1.26 2019/02/03 03:19:26 mrg Exp $ */
+/* $NetBSD: db_disasm.c,v 1.27 2019/03/09 08:42:25 maxv Exp $ */
/*
* Mach Operating System
@@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.26 2019/02/03 03:19:26 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.27 2019/03/09 08:42:25 maxv Exp $");
#ifndef _KERNEL
#include <sys/types.h>
@@ -1212,7 +1212,7 @@
else
pde = vtopte((vaddr_t)pte);
- if ((*pde & PG_V) == 0 || (*pte & PG_V) == 0) {
+ if ((*pde & PTE_P) == 0 || (*pte & PTE_P) == 0) {
db_printf("invalid address\n");
return (loc);
}
diff -r 9dcb40a90bf8 -r 2cb295118662 sys/arch/amd64/amd64/gdt.c
--- a/sys/arch/amd64/amd64/gdt.c Sat Mar 09 07:53:12 2019 +0000
+++ b/sys/arch/amd64/amd64/gdt.c Sat Mar 09 08:42:25 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gdt.c,v 1.46 2019/02/11 14:59:32 cherry Exp $ */
+/* $NetBSD: gdt.c,v 1.47 2019/03/09 08:42:25 maxv Exp $ */
/*
* Copyright (c) 1996, 1997, 2009 The NetBSD Foundation, Inc.
@@ -37,7 +37,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gdt.c,v 1.46 2019/02/11 14:59:32 cherry Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gdt.c,v 1.47 2019/03/09 08:42:25 maxv Exp $");
#include "opt_multiprocessor.h"
#include "opt_xen.h"
@@ -330,7 +330,7 @@
va = desc->rd_base + (i << PAGE_SHIFT);
frames[i] = ((paddr_t)xpmap_ptetomach((pt_entry_t *)va)) >>
PAGE_SHIFT;
- pmap_pte_clearbits(kvtopte(va), PG_RW);
+ pmap_pte_clearbits(kvtopte(va), PTE_W);
}
if (HYPERVISOR_set_gdt(frames, (desc->rd_limit + 1) >> 3))
diff -r 9dcb40a90bf8 -r 2cb295118662 sys/arch/amd64/amd64/locore.S
--- a/sys/arch/amd64/amd64/locore.S Sat Mar 09 07:53:12 2019 +0000
+++ b/sys/arch/amd64/amd64/locore.S Sat Mar 09 08:42:25 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.179 2019/03/07 13:26:24 maxv Exp $ */
+/* $NetBSD: locore.S,v 1.180 2019/03/09 08:42:25 maxv Exp $ */
/*
* Copyright-o-rama!
@@ -187,8 +187,8 @@
#define _RELOC(x) ((x) - KERNBASE)
#define RELOC(x) _RELOC(_C_LABEL(x))
-/* 32bit version of PG_NX */
-#define PG_NX32 0x80000000
+/* 32bit version of PTE_NX */
+#define PTE_NX32 0x80000000
#if L2_SLOT_KERNBASE > 0
#define TABLE_L2_ENTRIES (2 * (NKL2_KIMG_ENTRIES + 1))
@@ -307,7 +307,7 @@
ELFNOTE(Xen, XEN_ELFNOTE_HV_START_LOW, .quad, HYPERVISOR_VIRT_START)
ELFNOTE(Xen, XEN_ELFNOTE_FEATURES, .asciz, "")
ELFNOTE(Xen, XEN_ELFNOTE_PAE_MODE, .asciz, "yes")
- ELFNOTE(Xen, XEN_ELFNOTE_L1_MFN_VALID, .long, PG_V, PG_V)\
+ ELFNOTE(Xen, XEN_ELFNOTE_L1_MFN_VALID, .long, PTE_P, PTE_P)\
ELFNOTE(Xen, XEN_ELFNOTE_LOADER, .asciz, "generic")
ELFNOTE(Xen, XEN_ELFNOTE_SUSPEND_CANCEL, .long, 0)
#if NKSYMS > 0 || defined(DDB) || defined(MODULAR)
@@ -586,13 +586,13 @@
movl $RELOC(tmpstk),%esp
/*
- * Retrieve the NX/XD flag. We use the 32bit version of PG_NX.
+ * Retrieve the NX/XD flag. We use the 32bit version of PTE_NX.
*/
movl $0x80000001,%eax
cpuid
andl $CPUID_NOX,%edx
jz .Lno_NOX
- movl $PG_NX32,RELOC(nox_flag)
+ movl $PTE_NX32,RELOC(nox_flag)
.Lno_NOX:
/*
@@ -680,7 +680,7 @@
movl $RELOC(__rodata_start),%ecx
subl %eax,%ecx
shrl $PGSHIFT,%ecx
- orl $(PG_V),%eax
+ orl $(PTE_P),%eax
fillkpt
/* Map the kernel rodata R. */
@@ -688,7 +688,7 @@
movl $RELOC(__data_start),%ecx
subl %eax,%ecx
shrl $PGSHIFT,%ecx
- orl $(PG_V),%eax
+ orl $(PTE_P),%eax
fillkpt_nox
/* Map the kernel data+bss RW. */
@@ -696,7 +696,7 @@
movl $RELOC(__kernel_end),%ecx
subl %eax,%ecx
shrl $PGSHIFT,%ecx
- orl $(PG_V|PG_KW),%eax
+ orl $(PTE_P|PTE_W),%eax
fillkpt_nox
/* Map [SYMS]+[PRELOADED MODULES] RW. */
@@ -704,21 +704,21 @@
movl %esi,%ecx /* start of BOOTSTRAP TABLES */
subl %eax,%ecx
shrl $PGSHIFT,%ecx
- orl $(PG_V|PG_KW),%eax
+ orl $(PTE_P|PTE_W),%eax
fillkpt_nox
/* Map the BOOTSTRAP TABLES RW. */
movl %esi,%eax /* start of BOOTSTRAP TABLES */
movl $TABLESIZE,%ecx /* length of BOOTSTRAP TABLES */
shrl $PGSHIFT,%ecx
- orl $(PG_V|PG_KW),%eax
+ orl $(PTE_P|PTE_W),%eax
fillkpt_nox
/* We are on (4). Map ISA I/O MEM RW. */
movl $IOM_BEGIN,%eax
movl $IOM_SIZE,%ecx /* size of ISA I/O MEM */
shrl $PGSHIFT,%ecx
- orl $(PG_V|PG_KW/*|PG_N*/),%eax
+ orl $(PTE_P|PTE_W/*|PTE_PCD*/),%eax
fillkpt_nox
/*
@@ -726,7 +726,7 @@
*/
leal (PROC0_PTP2_OFF)(%esi),%ebx
leal (PROC0_PTP1_OFF)(%esi),%eax
- orl $(PG_V|PG_KW),%eax
+ orl $(PTE_P|PTE_W),%eax
movl $(NKL2_KIMG_ENTRIES+1),%ecx
fillkpt
@@ -734,7 +734,7 @@
/* If needed, set up level 2 entries for actual kernel mapping */
leal (PROC0_PTP2_OFF + L2_SLOT_KERNBASE * PDE_SIZE)(%esi),%ebx
leal (PROC0_PTP1_OFF)(%esi),%eax
- orl $(PG_V|PG_KW),%eax
+ orl $(PTE_P|PTE_W),%eax
movl $(NKL2_KIMG_ENTRIES+1),%ecx
fillkpt
#endif
@@ -744,7 +744,7 @@
*/
leal (PROC0_PTP3_OFF)(%esi),%ebx
leal (PROC0_PTP2_OFF)(%esi),%eax
- orl $(PG_V|PG_KW),%eax
+ orl $(PTE_P|PTE_W),%eax
movl $NKL3_KIMG_ENTRIES,%ecx
fillkpt
@@ -752,7 +752,7 @@
/* If needed, set up level 3 entries for actual kernel mapping */
leal (PROC0_PTP3_OFF + L3_SLOT_KERNBASE * PDE_SIZE)(%esi),%ebx
leal (PROC0_PTP2_OFF)(%esi),%eax
- orl $(PG_V|PG_KW),%eax
+ orl $(PTE_P|PTE_W),%eax
movl $NKL3_KIMG_ENTRIES,%ecx
fillkpt
#endif
@@ -762,14 +762,14 @@
*/
leal (PROC0_PML4_OFF)(%esi),%ebx
leal (PROC0_PTP3_OFF)(%esi),%eax
- orl $(PG_V|PG_KW),%eax
+ orl $(PTE_P|PTE_W),%eax
movl $NKL4_KIMG_ENTRIES,%ecx
fillkpt
/* Set up L4 entries for actual kernel mapping */
leal (PROC0_PML4_OFF + L4_SLOT_KERNBASE * PDE_SIZE)(%esi),%ebx
leal (PROC0_PTP3_OFF)(%esi),%eax
- orl $(PG_V|PG_KW),%eax
+ orl $(PTE_P|PTE_W),%eax
movl $NKL4_KIMG_ENTRIES,%ecx
fillkpt
diff -r 9dcb40a90bf8 -r 2cb295118662 sys/arch/amd64/amd64/machdep.c
--- a/sys/arch/amd64/amd64/machdep.c Sat Mar 09 07:53:12 2019 +0000
+++ b/sys/arch/amd64/amd64/machdep.c Sat Mar 09 08:42:25 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.326 2019/02/14 08:18:25 cherry Exp $ */
+/* $NetBSD: machdep.c,v 1.327 2019/03/09 08:42:25 maxv Exp $ */
/*
* Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -110,7 +110,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.326 2019/02/14 08:18:25 cherry Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.327 2019/03/09 08:42:25 maxv Exp $");
#include "opt_modular.h"
#include "opt_user_ldt.h"
@@ -1589,8 +1589,8 @@
#ifndef XENPV
extern uint32_t nox_flag;
pd_entry_t *pdir = (pd_entry_t *)bootspace.pdir;
- pdir[L4_SLOT_PTE] = PDPpaddr | PG_KW | ((uint64_t)nox_flag << 32) |
- PG_V;
+ pdir[L4_SLOT_PTE] = PDPpaddr | PTE_W | ((uint64_t)nox_flag << 32) |
+ PTE_P;
#endif
extern pd_entry_t *normal_pdes[3];
diff -r 9dcb40a90bf8 -r 2cb295118662 sys/arch/amd64/include/asan.h
--- a/sys/arch/amd64/include/asan.h Sat Mar 09 07:53:12 2019 +0000
+++ b/sys/arch/amd64/include/asan.h Sat Mar 09 08:42:25 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: asan.h,v 1.2 2019/02/04 15:07:34 maxv Exp $ */
+/* $NetBSD: asan.h,v 1.3 2019/03/09 08:42:25 maxv Exp $ */
/*
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -102,19 +102,19 @@
if (!pmap_valid_entry(L4_BASE[pl4_i(va)])) {
pa = __md_palloc();
- L4_BASE[pl4_i(va)] = pa | PG_KW | pmap_pg_nx | PG_V;
+ L4_BASE[pl4_i(va)] = pa | PTE_W | pmap_pg_nx | PTE_P;
}
if (!pmap_valid_entry(L3_BASE[pl3_i(va)])) {
pa = __md_palloc();
- L3_BASE[pl3_i(va)] = pa | PG_KW | pmap_pg_nx | PG_V;
+ L3_BASE[pl3_i(va)] = pa | PTE_W | pmap_pg_nx | PTE_P;
}
if (!pmap_valid_entry(L2_BASE[pl2_i(va)])) {
pa = __md_palloc();
- L2_BASE[pl2_i(va)] = pa | PG_KW | pmap_pg_nx | PG_V;
+ L2_BASE[pl2_i(va)] = pa | PTE_W | pmap_pg_nx | PTE_P;
}
if (!pmap_valid_entry(L1_BASE[pl1_i(va)])) {
pa = __md_palloc();
- L1_BASE[pl1_i(va)] = pa | PG_KW | pmap_pg_g | pmap_pg_nx | PG_V;
+ L1_BASE[pl1_i(va)] = pa | PTE_W | pmap_pg_g | pmap_pg_nx | PTE_P;
}
}
diff -r 9dcb40a90bf8 -r 2cb295118662 sys/arch/amd64/include/pte.h
--- a/sys/arch/amd64/include/pte.h Sat Mar 09 07:53:12 2019 +0000
+++ b/sys/arch/amd64/include/pte.h Sat Mar 09 08:42:25 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pte.h,v 1.11 2019/03/07 14:40:35 maxv Exp $ */
+/* $NetBSD: pte.h,v 1.12 2019/03/09 08:42:25 maxv Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -120,30 +120,27 @@
#define PTE_FRAME PTE_4KFRAME
#define PTE_LGFRAME PTE_2MFRAME
-/*
- * PDE/PTE bits. These are no different from their i386 counterparts.
- * XXX To be deleted.
- */
-#define PG_V 0x0000000000000001 /* valid */
-#define PG_RW 0x0000000000000002 /* read-write */
-#define PG_u 0x0000000000000004 /* user accessible */
-#define PG_WT 0x0000000000000008 /* write-through */
-#define PG_N 0x0000000000000010 /* non-cacheable */
-#define PG_U 0x0000000000000020 /* used */
-#define PG_M 0x0000000000000040 /* modified */
-#define PG_PAT 0x0000000000000080 /* PAT (on pte) */
-#define PG_PS 0x0000000000000080 /* 2MB page size (on pde) */
-#define PG_G 0x0000000000000100 /* not flushed */
-#define PG_AVAIL1 0x0000000000000200
-#define PG_AVAIL2 0x0000000000000400
-#define PG_AVAIL3 0x0000000000000800
-#define PG_LGPAT 0x0000000000001000 /* PAT on large pages */
-#define PG_FRAME 0x000ffffffffff000
-#define PG_NX 0x8000000000000000
-#define PG_2MFRAME 0x000fffffffe00000 /* large (2M) page frame mask */
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