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[src/trunk]: src/sys/arch/arm/sunxi sun50i_h6_ccu: add "pll_cpux"



details:   https://anonhg.NetBSD.org/src/rev/6a99f1376867
branches:  trunk
changeset: 996933:6a99f1376867
user:      jakllsch <jakllsch%NetBSD.org@localhost>
date:      Wed Feb 13 18:18:38 2019 +0000

description:
sun50i_h6_ccu: add "pll_cpux"

Currently intended for display of existing clock rate via the sysctl
tree, and not yet for DVFS.

diffstat:

 sys/arch/arm/sunxi/sun50i_h6_ccu.c |  16 ++++++++++++++--
 1 files changed, 14 insertions(+), 2 deletions(-)

diffs (44 lines):

diff -r c01c94d26fa4 -r 6a99f1376867 sys/arch/arm/sunxi/sun50i_h6_ccu.c
--- a/sys/arch/arm/sunxi/sun50i_h6_ccu.c        Wed Feb 13 18:04:35 2019 +0000
+++ b/sys/arch/arm/sunxi/sun50i_h6_ccu.c        Wed Feb 13 18:18:38 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i_h6_ccu.c,v 1.1 2018/05/01 19:53:14 jmcneill Exp $ */
+/* $NetBSD: sun50i_h6_ccu.c,v 1.2 2019/02/13 18:18:38 jakllsch Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: sun50i_h6_ccu.c,v 1.1 2018/05/01 19:53:14 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun50i_h6_ccu.c,v 1.2 2019/02/13 18:18:38 jakllsch Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -40,6 +40,7 @@
 #include <arm/sunxi/sunxi_ccu.h>
 #include <arm/sunxi/sun50i_h6_ccu.h>
 
+#define        PLL_CPUX_CTRL_REG       0x000
 #define        PLL_PERI0_CTRL_REG      0x020
 #define        AHB3_CFG_REG            0x51c
 #define        APB2_CFG_REG            0x524
@@ -213,6 +214,17 @@
 static struct sunxi_ccu_clk sun50i_h6_ccu_clks[] = {
        SUNXI_CCU_FIXED_FACTOR(H6_CLK_OSC12M, "osc12m", "hosc", 2, 1),
 
+       SUNXI_CCU_NKMP_TABLE(H6_CLK_PLL_CPUX, "pll_cpux", "hosc",
+           PLL_CPUX_CTRL_REG,          /* reg */
+           __BITS(15,8),               /* n */
+           0,                          /* k */
+           __BITS(1,0),                /* m */
+           __BITS(17,16),              /* p */
+           __BIT(31),                  /* enable */
+           __BIT(28),                  /* lock */
+           NULL,                       /* table */
+           SUNXI_CCU_NKMP_SCALE_CLOCK | SUNXI_CCU_NKMP_FACTOR_P_POW2),
+
        SUNXI_CCU_NKMP(H6_CLK_PLL_PERIPH0_4X, "pll_periph0_4x", "hosc",
            PLL_PERI0_CTRL_REG,         /* reg */
            __BITS(15,8),               /* n */



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