[src/trunk]: src/sys/dev/ic ahcisata: remove excessive delays from drive prob...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/d83ca619826f
branches:  trunk
changeset: 989075:d83ca619826f
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Mon Oct 11 12:48:10 2021 +0000

description:
ahcisata: remove excessive delays from drive probe path

There are a handful of inexplicable 500ms delays introduced to the drive
detect path in this driver, slowing boot. They can be re-enabled with
options AHCISATA_EXTRA_DELAY, but should not be enabled for normal kernels.
If a delay does need to be introduced in these places, the value should
either be more carefully selected or the scope limited to hardware that
requires the extra delay.

diffstat:

 sys/dev/ic/ahcisata_core.c |  14 ++++++++++++--
 1 files changed, 12 insertions(+), 2 deletions(-)

diffs (68 lines):

diff -r 7ecf7c2dceea -r d83ca619826f sys/dev/ic/ahcisata_core.c
--- a/sys/dev/ic/ahcisata_core.c        Mon Oct 11 10:59:09 2021 +0000
+++ b/sys/dev/ic/ahcisata_core.c        Mon Oct 11 12:48:10 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ahcisata_core.c,v 1.102 2021/10/05 08:01:05 rin Exp $  */
+/*     $NetBSD: ahcisata_core.c,v 1.103 2021/10/11 12:48:10 jmcneill Exp $     */
 
 /*
  * Copyright (c) 2006 Manuel Bouyer.
@@ -26,7 +26,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ahcisata_core.c,v 1.102 2021/10/05 08:01:05 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ahcisata_core.c,v 1.103 2021/10/11 12:48:10 jmcneill Exp $");
 
 #include <sys/types.h>
 #include <sys/malloc.h>
@@ -50,6 +50,8 @@
 
 #include "atapibus.h"
 
+#include "opt_ahcisata.h"
+
 #ifdef AHCI_DEBUG
 int ahcidebug_mask = 0;
 #endif
@@ -968,7 +970,9 @@
            AHCI_READ(sc, AHCI_P_CMD(chp->ch_channel))), DEBUG_PROBE);
 end:
        ahci_channel_stop(sc, chp, flags);
+#ifdef AHCISATA_EXTRA_DELAY
        ata_delay(chp, 500, "ahcirst", flags);
+#endif
        /* clear port interrupt register */
        AHCI_WRITE(sc, AHCI_P_IS(chp->ch_channel), 0xffffffff);
        ahci_channel_start(sc, chp, flags,
@@ -992,7 +996,9 @@
                /* XXX and then ? */
        }
        ata_kill_active(chp, KILL_RESET, flags);
+#ifdef AHCISATA_EXTRA_DELAY
        ata_delay(chp, 500, "ahcirst", flags);
+#endif
        /* clear port interrupt register */
        AHCI_WRITE(sc, AHCI_P_IS(chp->ch_channel), 0xffffffff);
        /* clear SErrors and start operations */
@@ -1062,7 +1068,9 @@
        switch (sata_reset_interface(chp, sc->sc_ahcit, achp->ahcic_scontrol,
            achp->ahcic_sstatus, AT_WAIT)) {
        case SStatus_DET_DEV:
+#ifdef AHCISATA_EXTRA_DELAY
                ata_delay(chp, 500, "ahcidv", AT_WAIT);
+#endif
 
                /* Initial value, used in case the soft reset fails */
                sig = AHCI_READ(sc, AHCI_P_SIG(chp->ch_channel));
@@ -1101,8 +1109,10 @@
                    AHCI_P_IX_IFS |
                    AHCI_P_IX_OFS | AHCI_P_IX_DPS | AHCI_P_IX_UFS |
                    AHCI_P_IX_PSS | AHCI_P_IX_DHRS | AHCI_P_IX_SDBS);
+#ifdef AHCISATA_EXTRA_DELAY
                /* wait 500ms before actually starting operations */
                ata_delay(chp, 500, "ahciprb", AT_WAIT);
+#endif
                break;
 
        default: