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[src/trunk]: src/sys/arch/arm/pic Unfortunately we need to disable interrupts...



details:   https://anonhg.NetBSD.org/src/rev/a5d10dcf081c
branches:  trunk
changeset: 959826:a5d10dcf081c
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Fri Feb 26 10:06:42 2021 +0000

description:
Unfortunately we need to disable interrupts in pic_set_priority to keep
hardware and ci_cpl in sync.

diffstat:

 sys/arch/arm/pic/picvar.h |  8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diffs (33 lines):

diff -r c8275c89ed51 -r a5d10dcf081c sys/arch/arm/pic/picvar.h
--- a/sys/arch/arm/pic/picvar.h Fri Feb 26 09:59:19 2021 +0000
+++ b/sys/arch/arm/pic/picvar.h Fri Feb 26 10:06:42 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: picvar.h,v 1.31 2021/02/21 17:07:45 jmcneill Exp $     */
+/*     $NetBSD: picvar.h,v 1.32 2021/02/26 10:06:42 jmcneill Exp $     */
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -107,6 +107,8 @@
 #include <sys/evcnt.h>
 #include <sys/percpu.h>
 
+#include <machine/cpufunc.h>
+
 #ifndef PIC_MAXPICS
 #define PIC_MAXPICS    32
 #endif
@@ -184,10 +186,14 @@
  */
 #define pic_set_priority(ci, newipl)                                   \
        do {                                                            \
+               register_t __psw = cpsid(I32_bit);                      \
                (ci)->ci_cpl = (newipl);                                \
                if (__predict_true(pic_list[0] != NULL)) {              \
                        (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], newipl); \
                }                                                       \
+               if ((__psw & I32_bit) == 0) {                           \
+                       cpsie(I32_bit);                                 \
+               }                                                       \
        } while (0)
 #else
 #define        pic_set_priority(ci, newipl)            ((void)((ci)->ci_cpl = (newipl)))



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